Linux内核模块makefile中的特殊文件编译

Question

I have a kernel module in which I would like to include a special file. The file is an ASM file. Nothing special about that, but the file extension is also ".asm" which isn't recognized by gcc. I would like to avoid any renaming due to portability. (It's also used in another non-GNU compiler.)

Usually my makefiles look something like this:

obj-m := chardev.o
chardev-objs := chardev2.o file2.o asm_test.o

all:
    make -C $(uClinux_dist_path) M=$$PWD modules

clean:
    make -C $(uClinux_dist_path) M=$$PWD clean

The asm_test is the offending one, as it's named "asm_test.asm". (It would work if named "asm_test.S".)

In my user space programs I can solve this by inserting the following rule:

asm_test.o:
    $(CC) -c -x assembler-with-cpp asm_test.asm

But that doesn't work in kernel makefiles it seems.

Anyone knows how to create special file rules in kernel makefiles?

Btw, I'm working with a cross compiled Blackfin uClinux dist. if it makes a difference.

Answer 1

The standard module Makefile for kbuild runs with 2 passes: the first just re-runs make out of the kernel source tree, which uses the complex kbuild suite of Makefiles to build your module. This second invocation uses the variable definitions out of your Makefile, but all the rules out of the kbuild world.

Section 3.10 (Special Rules) of the kbuild documentation https://www.kernel.org/doc/Documentation/kbuild/makefiles.txt explains how to create these extra rules. kbuild defines a few extra variables for you that you need to use to expand the actual directories used. In your case:

$(obj)/asm_test.o:
    $(CC) -c -x assembler-with-cpp -o $(obj)/asm_test.o $(src)/asm_test.asm

Notice that I've added an explicit output filename, to be sure that results go in the correct directory.

Answer 2

You don't need to rename the file, you can just copy or link to it:

asm_test.S: asm_test.asm
    ln -s asm_test.asm asm_test.S

Answer 3

In kernel's Makefile rules, each target added into obj-m is assumed to be a single source kernel module. That is why adding assmebly object into obj-m may fail. Kernel build rules treat each file as C source, then can not find your assembly source.

We must tell the make system that our module is multiple sources module.In the multiple sources module, the source may be C or assembly.

Here is example that defines an archive object file containing all objects, and adding this archive object file into obj-m.

obj-m += modulename.o
modulename-objs += cfile1.o cfile2.o asmfile.o

all:
    make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
clean:
    make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean

This example works fine with Linux 3.6.6 Makefile rules.