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SystemVerilog程序块与传统的测试平台

[英]SystemVerilog program block vs. traditional testbench

Are there any features of SV that a program block offers that can't be duplicated with other methods? 是否存在程序块提供的SV的任何功能,这些功能无法与其他方法重复使用?

The less concrete version of this question is: should I bother with program blocks for verification? 这个问题不太具体的版本是:我是否应该打扰程序块进行验证? I'm moving from an environment where we were constrained to Verilog-95 to an environment where SV is supported, and I'm wondering if I'm creating extra work for myself by not using program blocks. 我正在从一个受限于Verilog-95的环境转移到支持SV的环境中,我想知道我是否通过不使用程序块为自己创造额外的工作。

Check out IEEE Std 1800-2012 § 3.4 & § 24. For full description about program blocks. 查看IEEE Std1800-2012§3.4§24 。有关program块的完整描述。

In a short, incomplete summary, a program block: 在简短的,不完整的摘要中,一个program块:

  • cannot cannot contain always procedures, primitive instances, module instances, interface instances ( virtual interface and port interface is allowed), or other program instances. 不能always包含过程, primitive实例, module实例, interface实例(允许virtual interface和端口interface )或其他program实例。
  • specifies scheduling in the Reactive region. 指定Reactive区域中的计划。 This prevents race conditions. 这可以防止竞争条件。
  • has an extra system task $exit , which terminates the program instances that calls it. 有一个额外的系统任务$exit ,它终止调用它的program实例。
    • The simulation will terminate when all program instances have exited. 当所有program实例都退出时,模拟将终止。
  • is mostly like a module block except as stated above. 除了如上所述之外,它主要类似于module块。

The idea of a program block is to create a clear separation between test and design. program块的想法是在测试和设计之间创建清晰的分离。 In earlier versions of SystemVerilog (pre IEEE 1800), instantiation of a class was often limited to program blocks. 在早期版本的SystemVerilog(IEEE 1800之前版本)中, class实例化通常仅限于program块。 This emphasized the division of test and design. 这强调了测试和设计的划分。 It also made program blocks vital for verification engineers that that wanted to use object orientated programming in their flow. 它还使得program块对于希望在其流程中使用面向对象编程的验证工程师至关重要。 Since IEEE 1800, a class can be defined and instantiated almost anywhere. 从IEEE 1800开始,几乎可以在任何地方定义和实例化class As a result, program blocks became less sufficient. 结果, program块变得不够充分。

Today the opinion of usefulness of a program block is divided. 今天,对program块有用性的看法是分开的。 From the last few conventions I been to, the trend seems to be in favor of abandoning program blocks. 从我去过的最后几个约定来看,趋势似乎是赞成放弃program块。 This is because the advantages can be achieved by other methods. 这是因为其他方法可以实现这些优点。 Scheduling in the Reactive region can be done with clocking blocks. 可以使用clocking块来完成反应区域中的调度。 A mailbox , queue( [$] ), or associative array ( [*] ) can be used for intelligently handling simulation terminate running multiple tests. mailbox ,队列( [$] )或关联数组( [*] )可用于智能处理运行多个测试的模拟终止。 Personally, I still like using program blocks and use initial forever as an always equivalent when needed. 就个人而言,我仍然喜欢使用program块,并在需要时initial forever使用initial forever作为always等价的。 If you are planning to use UVM, then a non- program blocks test bench might work better for you. 如果您打算使用UVM,那么非program块测试平台可能会更适合您。

In the end, it really comes down to a methodology preference. 最后,它实际上归结为方法偏好。 It is best to evaluate and try it on your own. 最好自己评估和试用。

I do not recommend using program blocks - use a module instead. 我不建议使用程序块 - 而是使用模块。 I wrote a detailed article about this several years ago. 几年前我写了一篇关于这篇文章详细文章

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