如何使我的makefile自动链接库？

Question

#include <stdio.h>
#include <math.h>

int main(void)
{
    double test=23.4;
    test=sqrt(test);
    printf("%f",test);
}

In order to compile this I use: gcc -o test test.c -L/path/to/libs -lm

however, I would like to use my makefile in order to automatically link the math library and whatever other standard libraries I use in the future.

This is the makefile I am using:

CC=gcc
CFLAGS=-Wall
LDFLAGS=-lm

OBJECTS=client.o
SOURCE=client.c

client: $(OBJECTS)
    $(CC) $(CFLAGS) $(OBJECTS) -o client $(LDFLAGS) $(LIBS)

all:client

.PHONY: clean
clean:
    rm -f *~ *.o client

how do I modify this makefile in order to automatically link the libraries?

Answer 1

From the comments in the other answer, it appears you are using make test to build a different program than what is specified in the makefile (what you get when you just type make ) If you want that to work, you need to use the correct variable names for the default rules:

CC=gcc
CFLAGS=-Wall
LDFLAGS=-L/path/to/libs
LDLIBS=-lm

with just that in your makefile, you can use make test to compile test.c into an executable named test (or make client to compile client.c).

If you want to compile multiple files into a single executable, you need to add rules like you have in your makefile (but instead using the standard variable names):

OBJECTS=client.o otherfile.o extra.o

client: $(OBJECTS)
        $(CC) $(LDFLAGS) -o $@ $^ $(LDLIBS)

edit

Just to be clear, the default rule that GNU-make applies to .c files to produce executables when there's no other rule that matches the executable is:

.c:
         $(CC) $(CFLAGS) $(CPPFLAGS) $(LDFLAGS) $(TARGET_ARCH) $^ $(LOADLIBES) $(LDLIBS) -o $@

Other versions of make do something similar (the $(TARGET_ARCH) and $(LOADLIBES) are specific to GNU make; many makes also don't have $(CPPFLAGS) ). You can see the default set of rules by running make -p in a directory with no Makefile.

You can replace the above pattern rule with something different in the Makefile if you wish, in which case make will do whatever you tell it to do.

Answer 2

CC=gcc
CFLAGS=-Wall
LDFLAGS=-lm
LIBPATH=-L/path/to/libs

OBJECTS=client.o
SOURCE=client.c

client: $(OBJECTS)
    $(CC) $(CFLAGS) $(OBJECTS) -o client $(LIBPATH) $(LDFLAGS) $(LIBS)

all:client

.PHONY: clean
clean:
rm -f *~ *.o client