为什么阻塞技术会减少分支指令？

Question

I profiled Blocking matrix multiplication as the size of block increased Number of branch instruction decreased. as in Image1 boxed group has 4.5 million Branch instruction but in other groups it is about 17 million Branch instruction this is in case that only order of loops have changed. As far as I know branch instruction depend on any branch instruction (conditional or unconditional) used in code or as in its machine code but I can't figure it out how loop reordering can change the amount of branching. despite loop reordring blocking technique can also affect number of Branch Instruction.

OS is linux x86_64 Ram 4G l1 cache 32k 64Byte line size L2 cache 2048k 64Byte line size 4-way associative. profile with papi_library

kij algorithm

For (k=0;k<n;k++)
For(i=0;i<n;i++){
    r=A[i][k];
  For (j=0;j<n;j++)
      C[i][j]+=r*B[k][j] 
}

ikj algorithm

For (i=0;i<n;i++)
 For(k=0;k<n;k++){
  r=A[i][k];
  For (j=0;j<n;j++)
       C[i][j]+=r*B[k][j] 
}   

my blocking code is not at hand but use 1 level of blocking.

Image 1 (chart are scaled logarithmic and may be all groups looks like the same but the values are true)

Questions :

1- why loop reordering or blocking can decrease or Increase amount of Branch Instruction?

thanks

Answer 1

Loop reordering, which is one of code-block reordering optimizations, alters the order of the basic blocks in a program in order to reduce conditional branches and improve locality of reference .

To describe branch reduction simply, let's say you have a code like this:

void foo(bool is_enabled) {
  for (int i = 0; i < 10000; ++i) {
    if (is_enabled) {
      data[i].enable();
    } else {
      data[i].disable();
    }
  }
}

Given that there is no need to check is_enabled all the time, what compiler might decide to do is this:

void foo(bool is_enabled) {
  if (is_enabled) {
    for (int i = 0; i < 10000; ++i) {
      data[i].enable();
    }
  } else {
    for (int i = 0; i < 10000; ++i) {
      data[i].disable();
    }
  }
}

... thus reducing a number of branches by 9999 (only one check for is_enabled instead of 10000).

In the code snippet you have, this is more a locality of reference optimization to play nicely with memory pre-fetcher and CPU caches, due to a more hardware friendly memory access pattern.

Answer 2

I don't think loop reordering would affect the number of branch instructions generated for your sample code because it has no conditional test inside the loop and all the loops are the same length.

If the block size is known at compile time, your compiler might be unrolling the loop for each block.

You should really look at the assembly output from your compiler.