如何在as汇编器中禁用优化？

Question

I would like to find a way to assemble assembly code into the opcodes I want, not what the assemblerwants! (Something like gcc -O0 but for assembly). My reasons involve teaching etc, etc.

For example AS likes to change MOV r1, r2 into ADD r1, r2, #0.

This is all very well when I'm looking for faster code but not so great for teaching when I need the correct opcodes. I'm using AS and LD in a linux environment (ARM processor). Any ideas?

Answer 1

There were some syntax changes from earlier ARM assembly language to preferred syntax. For example: STMFD sp!, reglist became PUSH reglist.

Here's a reference I found that mentions this: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0204j/Cjagjjbc.html

It also states that, in reference to Thumb instructions:

"If Rd and Rn are both Lo registers, MOV Rd, Rn is disassembled as ADDS Rd, Rn, #0."

which may be what you are seeing.