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32位与64位架构的内存访问

[英]Memory access on 32 vs 64 bits architectures

by default, what's the standard size of a variable that can be read on 32 bits and 64 bits processor using a single instruction? 默认情况下,使用单条指令可以在32位和64位处理器上读取的变量的标准大小是多少?

For example, when I have a double (8 bytes size) in C language is it read respectively in one instruction (on a 64 bits processor) and in two operations (on a 32 bits processor) ? 例如,当我在C语言中有一个double(8字节大小)时,它分别在一条指令(64位处理器)和两个操作(32位处理器)上读取?

I think this problem is actually the difference between what we call the "memory word" (which is equal to 1 byte) and the "processor word" (I don't know this size value but it would depend of 32 bits or 64 bits processor, right ?). 我认为这个问题实际上是我们称之为“存储器字”(等于1字节)和“处理器字”之间的区别(我不知道这个大小值,但它取决于32位或64位处理器,对吗?)。

Thanks 谢谢

32-bit processors work on 32 bits of data at a time. 32位处理器一次处理32位数据。 64-bit processors work on 64 bits of data at a time. 64位处理器一次处理64位数据。

is it read respectively in one instruction (on a 64 bits processor) and in two operations (on a 32 bits processor) ? 它是分别在一条指令(64位处理器)和两个操作(32位处理器)上读取的吗?

A "generic" 32-bit processor would have fetch two 32-bit chunks of data separately and combine them. “通用”32位处理器将分别获取两个32位数据块并将它们组合在一起。 The exact number of instructions may depend on the processor. 确切的指令数可能取决于处理器。

Having said that, many processors have specialized architectures to better handle floating-point data 话虽如此,许多处理器都有专门的架构来更好地处理浮点数据

http://en.wikipedia.org/wiki/Floating-point_unit http://en.wikipedia.org/wiki/Floating-point_unit

While most concrete 32-bit processors will need two fetch operations to load a 64-bit integer, the same may not be true for floating-point types on the same processor. 虽然大多数具体的32位处理器需要两次读取操作才能加载64位整数,但同一处理器上的浮点类型可能不一样。

Additionally, some processors have the ability to process vectors in few instructions. 另外,一些处理器能够在很少的指令中处理向量。 Most modern C compilers are able to emit such instructions when appropriate. 大多数现代C编译器都能够在适当的时候发出这样的指令。 See for example: 参见例如:

http://en.wikipedia.org/wiki/SSE2 http://en.wikipedia.org/wiki/SSE2

It depends on the ISA of the processor which is somewhat unrelated to the size of a virtual memory address or integer size ( 32 vs 64 bit ). 它取决于处理器的ISA ,它与虚拟内存地址或整数大小(32对64位)有些无关。

As an example consider vector extension instruction that are available on many processors, they operate on chunks of memory which are bigger than the processor word: http://en.wikipedia.org/wiki/Streaming_SIMD_Extensions http://www.arm.com/products/processors/technologies/neon.php 作为一个例子,考虑许多处理器上可用的向量扩展指令,它们在大于处理器字的内存块上运行: http//en.wikipedia.org/wiki/Streaming_SIMD_Extensions http://www.arm.com /products/processors/technologies/neon.php

It is true that when referring to 32bit or 64 bit processor, without further specifications, we intend that all the processor datapaths (including address and integers) have the corresponding size. 确实,当提到32位或64位处理器时,没有进一步的规范,我们打算所有处理器数据路径(包括地址和整数)都具有相应的大小。

In practice , many processors (including x86/ARM) 在实践中 ,许多处理器(包括x86 / ARM)

  • Use different sizes for integer/floating point datapaths and addresses, eg Pentium processors had 32 bits integer but a 64 bits data bus Pentium Manual . 对整数/浮点数据路径和地址使用不同的大小,例如奔腾处理器具有32位整数但是64位数据总线Pentium Manual
  • Provide single instructions in their ISA that operate on multiples (or fractions) of the standard processor word, eg ARM processors can load a double word (64 bit) from memory even if the processor is 32 bit. 在ISA中提供单个指令,这些指令在标准处理器字的倍数(或分数)上运行,例如,即使处理器是32位,ARM处理器也可以从存储器加载双字(64位)。

This is done to have a better performing processor; 这样做是为了拥有性能更好的处理器; if an instruction is provided to load a double word then only one instruction has to be fetched, decoded, issued, executed and committed instead of two. 如果提供了加载双字的指令,那么只需要提取,解码,发出,执行和提交一条指令而不是两条指令。 Similarly vector instructions can perform a job that would require many instructions using a single one, greatly reducing the load in the pipeline of a processor. 类似地,向量指令可以执行需要使用单个指令的许多指令的作业,从而大大减少处理器的流水线中的负载。

There is no consistent and universal definition of what the terms "32-bit" and "64-bit" actually mean. 对于“32位”和“64位”这两个术语的实际含义,没有一致和通用的定义。 There are perhaps half a dozen or so characteristics that could be used to define them (data bus width, address size, general-purpose CPU register size, probably others). 有迹象表明, 可以用来定义它们(数据总线宽度,地址尺寸,通用CPU寄存器的大小,可能其他人)也许有半打左右的特性。

The terms are most meaningful within an architecture family. 这些术语在架构系列中最有意义。 For example, it makes sense to compare the characteristics of the x86 and x86_64 architectures, or the 32-bit and 64-bit versions of SPARC. 例如,比较x86和x86_64体系结构的特性,或者32位和64位版本的SPARC是有意义的。

Bottom line: Though your question is not necessarily vague, any possible answers to it probably are. 一句话:虽然你的问题不一定含糊不清,但任何可能的答案都可能是。 A so-called "32-bit" CPU might very well have instructions to access 64-bit quantities. 所谓的“32位”CPU很可能具有访问64位数量的指令。 On the other hand, the Motorola 68008 implemented a 16/32 bit instruction set architecture, but only had an 8-bit external data bus; 另一方面, Motorola 68008采用16/32位指令集架构,但只有8位外部数据总线; its 8-bitness was invisible to applications apart from a speed penalty. 除了速度惩罚之外,它的8位对于应用程序是不可见的。

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