在Linux内核Makefile中构建变量

Question

I am currently trying to understand the build process for the Linux kernel. While looking through the Makefiles, I found several rules in the form

scripts_basic:
    $(Q)$(MAKE) $(build)=scripts/basic
    $(Q)rm -f .tmp_quiet_recordmcount

which all recursively call other make processes and also pass the directory to process. Simultaneously, there seems to be a variable, which is passed, indicating what to do with the subdirectory (the $(build) part.

Looking at the make process, as far as I can see, this always seems to be obj , I cannot find any other value for this variable so far during the make process. Also, I cannot seem to find any place where this variable is set.

So what exactely is this variable for and how is it used (eg, where is set and processed).

Answer 1

Not exactly. The relevant bit is in scripts/Kbuild.include , where it says

build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj

What this means is that if $(KBUILD_SRC) is not empty, the path to scripts/Makefile.build is given as an absolute path (or at least with a path that can be found from the working directory) by prepending the path to the top of the kernel source tree. As far as I can tell, this is to make the sub-makes all use the same Makefile and avoid having the same make code several dozen times.