3个ALU +解码器中的每一个同时在“ switch” /“ case”上的3个不同条件分支上行走？

Question

As known, on Intel x86_64 the Hyper Threading allow to use shared execution units (ALUs, ...) from different threads simultaneously - this is known as Simultaneous multithreading (SMT).

And known, that threads, which executed on Hyper Threading virtual cores, can process different sequences of instructions - code of different processes, of different functions, or different branches of one conditional branch of one function, etc.

Ie 4 decoders of 1st virtual core can process one sequence of instructions, and other 4 decoders of 2nd virtual core can process other sequence of instructions.

But can the single thread simultaneously execute (out-of-order) different branches of one conditional branch , ie can CPU-Core execute two or more conditional branches at the same time, to predict a variety of options conditional jumps?

For example, each of 3 ALU+decoders walk on 3 different conditional branches on switch / case simultaneously.

Answer 1

That picture is not entirely accurate, much less is duplicated. Almost everything is shared, except:

• the architectural state, obviously
• on SB and IB, the loop buffer

In particular, the decoders are shared, and alternate between the threads.

In principle you could have hardware threads "go down both paths" at a branch, but that's not what HyperThreading (or anything else in current Intel processors) does. One path is chosen, and followed speculatively until either it has to be discarded or it becomes non-speculative.

Executing both paths (aka eager execution, or dual path execution) has been explored, particularly in the 90's, but has never seen serious use. Consider that using the same resources, executing both paths means that the correct one will have been executed less far than if it had been the sole path. Branch prediction is on average highly effective, more than 90% correct (though also highly variable), so on average it is better to just go for that one path. Some research has shown promising results for using dual path execution for low-confidence branches.