[英]RISC-V RV32I soft float lib calls MUL and MULHU instructions in __muldf3
I'm using current riscv-tools to build a firmware image for the PicoRV32 core. 我正在使用当前的riscv-tools为PicoRV32内核构建固件映像。 The firmware requires floating point, so I'm using
-msoft-float
. 固件需要浮点,所以我使用
-msoft-float
。 This are the compiler/linker options I am using: 这是我正在使用的编译器/链接器选项:
-Os -m32 -march=RV32I -msoft-float -ffreestanding -nostdlib -lgcc
in this configuration, __muldf3 is provided by (according to the linkers -Map
output): 在这个配置中,__ muldf3由(根据链接器
-Map
输出)提供:
/opt/riscv/lib/gcc/riscv64-unknown-elf/4.9.2/soft-float/32/libgcc.a(dp-bit.o)
But this code is not compatible with the RV32I ISA: It uses the MUL
and MULHU
instructions! 但是这段代码与RV32I ISA不兼容:它使用
MUL
和MULHU
指令!
How do I get soft-float for the plain RV32I ISA? 如何获得普通RV32I ISA的软浮动? Do I need to compile my own version of libgcc.a?
我需要编译自己的libgcc.a版本吗? Are there instructions somewhere on how to do this?
有没有关于如何做到这一点的说明?
As you've noticed, the "-march=" flag only affects the current translation unit, not the libraries which get generated at toolchain build time. 正如您所注意到的,“-march =”标志仅影响当前的转换单元,而不影响在工具链构建时生成的库。
Although there exist "disable-atomics"/"disable-float" configuration flags for building the toolchain, there is no multilib option for multiply/divide because they don't affect the ABI; 尽管存在用于构建工具链的“disable-atomics”/“disable-float”配置标志,但是没有用于乘法/除法的multilib选项,因为它们不会影响ABI; the assumption is that the execution environment can emulate those instructions.
假设执行环境可以模拟这些指令。
To the last point, the latest Privileged ISA v1.7 is designed such that you can run mul/div code and then trap into the machine-mode to emulate the mul/div instructions (you can even trap into M-mode while running in M-mode!). 到最后一点,最新的Privileged ISA v1.7的设计使你可以运行mul / div代码然后陷入机器模式来模拟mul / div指令(你甚至可以在运行时陷入M模式M-模式!)。 You'd have to provide your own mul trap handler in M-mode (probably located in your own crt0 file and linked in at compile time).
您必须在M模式下提供自己的mul陷阱处理程序(可能位于您自己的crt0文件中并在编译时链接)。
I instead recommend you try the "--with-arch" flag. 我建议你尝试“--with-arch”标志。 A recent patch supports the --with-arch flag, so it's possible to build a gcc that by default won't generate multiply/divide.
最近的补丁支持--with-arch标志,因此可以构建一个默认情况下不会生成乘法/除法的gcc。 This will prevent libgcc from containing those instructions.
这将阻止libgcc包含这些指令。 You can try adding --with-arch=RV32I to the gcc configure line (to do so, you'll have to modify Makefile.in in the riscv-gnu-toolchain).
您可以尝试将--with-arch = RV32I添加到gcc配置行(为此,您必须在riscv-gnu-toolchain中修改Makefile.in)。
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