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如何在 u-boot 中设置此寄存器的位

[英]How bits of this register is set in u-boot

I am trying to figure out how "SRAM_CTL1_CFG" register's 4th and 5th bit is set using following statement in u-boot:我试图弄清楚如何使用 u-boot 中的以下语句设置“SRAM_CTL1_CFG”寄存器的第 4 位和第 5 位:

/* Map SRAM to EMAC */
   setbits_le32(&sram->ctrl1, 0x5 << 2);

http://git.denx.de/?p=u-boot.git;a=blob;f=drivers/net/sunxi_emac.c;h=11cd0ea06888ba8e271b0c10376306df5291a3e2;hb=HEAD#l503 http://git.denx.de/?p=u-boot.git;a=blob;f=drivers/net/sunxi_emac.c;h=11cd0ea06888ba8e271b0c10376306df5291a3e2;hb=HEAD#l503

As per datasheet if bit 4:5 of this "SRAM_CTL1_CFG" become "01" SRAM would be mapped to EMAC peripheral.根据数据表,如果此“SRAM_CTL1_CFG”的位 4:5 变为“01”,则 SRAM 将映射到 EMAC 外设。

http://linux-sunxi.org/SRAM_Controller_Register_Guide http://linux-sunxi.org/SRAM_Controller_Register_Guide

Shouldn't this setbits_le32(&sram->ctrl1, 0x5 << 2) be setbits_le32(&sram->ctrl1, 0x4 << 2) ?这个setbits_le32(&sram->ctrl1, 0x5 << 2)应该是setbits_le32(&sram->ctrl1, 0x4 << 2)吗?

So, the answer is that yes, (0x5 << 2), which is 20 decimal is 010100 in binary and we set '4:5' to '01' which is EMAC as well as setting bit 2 to 1. Setting bit 2 to 1 is currently a magic value that we're setting because it's being set (presumably, I didn't trace all of the history back) in the sources allwinner provides, without further explanation.所以,答案是肯定的,(0x5 << 2),十进制的 20 是二进制的 010100,我们将“4:5”设置为“01”,即 EMAC,并将第 2 位设置为 1。设置第 2 位to 1 目前是我们正在设置的魔法值,因为它是在 allwinner 提供的来源中设置的(大概,我没有追溯所有历史),没有进一步解释。 Setting this to (0x4 << 2) would only set the claimed registers but is likely to have some hidden breakage on other boards where the magic value is required too.将此设置为 (0x4 << 2) 只会设置声明的寄存器,但在其他也需要魔术值的板上可能会有一些隐藏的损坏。

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