Makefile中未找到命令错误

Question

I am trying to write a Makefile. This is what I have written.

CC='/buildtools/toolchain/wr-x86/3.0FCScg/bin/i586-wrs-linux-gnu-gcc --sysroot=/buildtools/toolchain/wr-x86/3.0FCScg/sysroot'
IDIR =../../../include
CFLAGS=-I$(IDIR)

LDIR =../../../../../../../../.debug/lib.out/public/
LIBS= -lmylib1 -lmylib2 -lmylib3

myexec: my_code.c
    $(CC) $(CFLAGS) -o myexec my_code.c

This when run throws an error

make: /buildtools/toolchain/wr-x86/3.0FCScg/bin/i586-wrs-linux-gnu-gcc --sysroot=/buildtools/toolchain/wr-x86/3.0FCScg/sysroot: Command not found

However, it works when I run the compile command manually in terminal.

export CC='/buildtools/toolchain/wr-x86/3.0FCScg/bin/i586-wrs-linux-gnu-gcc --sysroot=/buildtools/toolchain/wr-x86/3.0FCScg/sysroot'
$CC -I ../../../include -L ../../../../../../../../.debug/lib.out/public/ -lmylib1 -lmylib2 -lmylib3 -o myexec my_code.c

Answer 1

Change the definition in the Makefile to this:

CC=/buildtools/toolchain/wr-x86/3.0FCScg/bin/i586-wrs-linux-gnu-gcc --sysroot=/buildtools/toolchain/wr-x86/3.0FCScg/sysroot

With the quotes, make uses the whole definition as the name of the executable to look for.

The reason it works when you define CC outside the Makefile is the rules for handling quotes are different for the shell and the Makefile.

A more common convention is to use CFLAGS for all compilation flags. As a matter of facts, I strongly suggest you add Wall -W to your CFLAGS definition.

Regarding the libraries, you should expand $LIBS after the source and object files on the cc or ld command line.