[英]Is it possible to use gcc/g++/nvcc automatic dependency -M in a single pass of a Makefile without saving dependencies to a file?
I was trying to come up with a solution for automatic dependency using gcc/g++/nvcc and a Makefile. 我试图使用gcc / g ++ / nvcc和一个Makefile提出一种自动依赖解决方案。
I thought I'd come up with a solution, to call gcc -M $(SRC FILES) in a Makefile before any compilation targets, with the assumption that Make would now have updated rules for the compilation targets. 我以为我会想出一个解决方案,在任何编译目标之前先在Makefile中调用gcc -M $(SRC FILES),并假设Make现在具有针对编译目标的更新规则。
An example of the Makefile I've thought would work is as follows: 我认为可以工作的Makefile示例如下:
PROG = main.out
SRC = $(wildcard *.cc)
OBJ = $(SRC:.cc=.o)
all: $(PROG) | deps
$(PROG): $(OBJ)
g++ -o $@ $^
$(OBJ): $(SRC)
g++ -c $<
.PHONY: deps
deps:
g++ -M $(SRC)
Now I'm wondering if the call to 现在我想知道是否打给
g++ -M $(SRC)
Just causes the dependencies to be printed to stdout and infact the Makefile is still none the wiser to the automatic dependencies. 只是导致将依赖项打印到stdout上,实际上Makefile仍然不是自动依赖项的明智之选。
Ideally I'm looking for a solution that will run in a single pass of a Makefile and use gcc/g++/nvcc automatic dependency flags, and preferably one that doesn't require saving the dependencies to a whole bunch of files. 理想情况下,我正在寻找一种可以在Makefile的单次运行中运行并使用gcc / g ++ / nvcc自动依赖性标志的解决方案,最好是一种不需要将依赖性保存到整个文件堆的解决方案。
You can do something like below to get both .o
and .d
files: 您可以执行以下操作来获取
.o
和.d
文件:
g++ -c main.cpp -o main.o -MP -MMD -MF main.d
So define your dependency files (eg DEPFILES
) in your Makefile and generate .d
like the above command, then include DEPFILES
by -
, which tells GNU Make to include the dep file if it exists. 因此,请在Makefile中定义依赖文件(例如
DEPFILES
),并像上面的命令一样生成.d
,然后通过-
包含DEPFILES
,这将告诉GNU Make包含dep文件(如果存在)。
-include $(DEPFILES)
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