[英]Variable substitution in Makefile target dependency
I have a Makefile with targets that have associated dependencies. 我有一个包含相关依赖项的目标的Makefile。 So I use lookup table like: 所以我使用查找表,如:
APPS = a b c
dependency.lookup.a := x
dependency.lookup.b := y
dependency.lookup.c := z
$(APPS): %: path/$(dependency.lookup.%).datafile
do something with $(dependency.lookup.$@)
This makefile gives me error. 这个makefile给了我错误。 *** No rule to make target 'path/.datafile' ***没有规则来制作目标'path / .datafile'
Constraints: Only MinGW. 约束:只有MinGW。 can't use shell/MSYS. 不能使用shell / MSYS。 Also support FreeBSD. 也支持FreeBSD。
This requires using Secondary Expansion feature: 这需要使用辅助扩展功能:
.SECONDEXPANSION:
$(APPS): %: path/$$(dependency.loopup.$$*).datafile
@echo "$@ depends on $^"
%.datafile : # Create one on demand for testing.
mkdir -p ${@D}
touch $@
Outputs: 输出:
mkdir -p path/
touch path/x.datafile
a depends on path/x.datafile
Alternatively, use regular dependencies: 或者,使用常规依赖项:
a : path/x.datafile
b : path/y.datafile
c : path/z.datafile
$(APPS): % :
@echo "$@ depends on $^"
The top 3 lines only add dependencies, the rule is specified separately. 前3行仅添加依赖项,规则单独指定。 The output is the same. 输出是一样的。
I had the same problem but with rather long names. 我有同样的问题,但名字相当长。 I didn't want to repeat them (in APPS = ...
), so I used a generated auxiliary makefile. 我不想重复它们(在APPS = ...
),所以我使用了生成的辅助makefile。
Makefile
: Makefile
:
all: build
include deps.mk
deps.mk: deps.txt deps.sh
./deps.sh <$< >$@
build: $(DEPS)
echo "DEPS are up-to-date." # or whatever
deps.sh
: deps.sh
:
#!/bin/bash
echo "# This file is generated by $0"
echo "DEPS ="
while read -r dst src; do
echo
echo "DEPS += $dst"
echo "$dst: $src"
echo -e '\t''cp $< $@' # or whatever
done
deps.txt
(now only this file needs to be updated for new dependencies): deps.txt
(现在只需要为新依赖项更新此文件):
a x
b y
c z
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