ARM Cortex-m4 启动顺序

Question

I am a bit confused about boot sequence of ARM Cortex-m processors. From many different resources, i read that upon reset, the cortex-m copies contents from 0x0 to stack pointer and copies reset handler address from 0x4 to PC... My questions are:

1) how the cortex-m processor copies these two values to appropriate registers, I mean processor need LDR/STR instruction to do so, but here values are automatically copied??? How the processor know thats these two words need to be copied.

2) does cortex-m controller contains any builtin firmware that is executed initially?

3) Normally processors after reset, start execting from a specific memory location in reset vector where the jump instruction is placed to reset handler... but here in cortex-m the processors start by copying first two words into registers and then Program counter points to Reset Handler... No jump instruction no Specific memory location where processor jump on reset.!!! How is it possible??

Answer 1

2) does cortex-m controller contains any builtin firmware that is executed initially?

Depends highly on the model and make. Example: NXP LPC series Cortex-M chips (like LPC17xx) have some masked ROM instructions that are executed before the program in flash. Others may have no such memory build in.

1) how the cortex-m processor copies these two values to appropriate registers, I mean processor need LDR/STR instruction to do so

This happens in hardware before any code execution, so no LDR instructions needed.

Its ridiculously simple, if you know what a state machine is and how to implement one in a hardware description language like VHDL or Verilog.