[英]Is there an equivalent register to Intel's MSR_SMI_COUNT on AMD architecture?
On recent Intel CPUs it's possible to count the number of SMIs that have occurred, by reading msr 0x34.在最近的 Intel CPU 上,可以通过读取 msr 0x34 来计算发生的 SMI 的数量。
I have checked the manuals at - https://developer.amd.com/resources/developer-guides-manuals/我检查了手册 - https://developer.amd.com/resources/developer-guides-manuals/
for an equivalent register/function, without success.对于等效的寄存器/功能,没有成功。
否,但 SMI 计数可用作 AMD 处理器上的 PMC(性能计数器)。
AMD Zen specifies the LsSmiRx performance counter for System Management Interrupts (SMIs) : AMD Zen 为系统管理中断 (SMI)指定 LsSmiRx 性能计数器:
PMCx02B [SMIs Received] (Core::X86::Pmc::Core::LsSmiRx) Counts the number of SMIs received.
( Open-Source Register Reference For AMD Family 17h Processors Models 00h-2Fh. Rev 3.03, 2018, page 153 ) ( AMD 系列 17h 处理器型号 00h-2Fh 的开源寄存器参考。Rev 3.03,2018,第 153 页)
On Linux, you can monitor it like this:在 Linux 上,您可以像这样监控它:
# perf stat -e ls_smi_rx -I 60000
This command prints each minute a count of all newly triggered SMIs aggregated over all CPUs.此命令每分钟打印在所有 CPU 上聚合的所有新触发的 SMI 的计数。
That means for monitoring - unlike with the MSR_SMI_COUNT
register available on Intel CPUs - you have to actively program a PMU register (to observe the LsSmiRx event).这意味着监控 - 与英特尔 CPU 上可用的
MSR_SMI_COUNT
寄存器不同 - 您必须主动编程 PMU 寄存器(以观察 LsSmiRx 事件)。
NB: The above referenced AMD documentation confirms that AMD Zen doesn't support the SMI_COUNT MSR (0x34), since it isn't included in the list of available MSRs (in Chapter 2.1.10, page 77).注意:上面引用的 AMD 文档确认 AMD Zen 不支持 SMI_COUNT MSR (0x34),因为它不包含在可用 MSR 列表中(在第 2.1.10 章,第 77 页)。
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