使用typedef +打包数组（vs多维打包数组）对每个元素的带符号类型有效吗

Question

I have a question about signed property with multiple packed dimensions which is defined in stages with typedef.

Basically,

logic signed [1:0][2:0] foo;

* foo[0] is not signed (signed is meaningless if you expect signed element) because all entire packed array is signed but each element is not signed.

But,

typedef logic signed [1:0] foo_t;
foo_t [2:0] foo;

* foo[0] is signed. What a strange..

Q1> What happens? Why is it signed??

Q2> Is it same declaration with logic signed [1:0][2:0] foo; // ??

Q3> LRM says that [1:0] index varies most rapidly, which is not my expectation. logic signed [2:0][1:0] foo; //??

Answer 1

This is an artifact of the allowed syntax(BNF). The signed keyword applies signedness to the identifier as a whole, not to the individual elements ( logic ) you are packing. There's no syntax that allowes you to control the signedness of each dimension except by the typedef stages you discovered.

When you create a multidimensional array in stages, each dimension you add varies less rapidly than the previous. So dimensionally, your typedef is equivalent to

logic signed [2:0][1:0] foo;
foo_t [2:0] foo; // the [2:0] gets added to the left of [1:0]

Answer 2

If use an unpacked array, we can also keep signed property for each element.

logic signed [1:0] foo [2:0];

But, it seems that array of typedef with unpacked array is not supported by systemverilog.

typedef logic signed data_t [3:0];
data_t [2:0] foo;

When I try this, compiler shows an error

“illegal element type for a vector (vector element type must be an integral type)”. - you may leave any comment for this.

Anyway, thanks for your answer.