[英]Target dependency: Makefile no rule to make target error
Here is the make file that I am running,这是我正在运行的 make 文件,
.PHONY: build
build: pre_build_script $(OUTPUTDIR)/%.cpp
$(OUTPUTDIR)/%.cpp: $(INTXTDIR)/%.txt
python.exe $(SOMEDIR)/somepythonscript.py $(INTXTDIR) $(OUTPUTDIR)
.PHONY: pre_build_script
pre_build_script:
pythonscript.exe $(PREBUILDDIR)
This is the output that I get:这是我得到的输出:
$ make build
pythonscript.exe $(SAMPLEDIR)
make: *** No rule to make target '../obj/CPP/%.cpp', needed by 'build'. Stop.
Looks like I'm missing on some sytanx as I get this error inspite of declaring the target dependency.看起来我在某些 sytanx 上遗漏了,因为尽管声明了目标依赖项,但我还是收到了这个错误。 Any suggestions?
有什么建议?
This means make
cannot find a file named $(OUTPUTDIR)/%.cpp
, a prerequisite for the first rule.这意味着
make
找不到名为$(OUTPUTDIR)/%.cpp
,这是第一条规则的先决条件。
You cannot use %
as a wildcard anywhere in a rules like this:您不能在这样的规则中的任何地方使用
%
作为通配符:
build: pre_build_script $(OUTPUTDIR)/%.cpp
it needs to be a part of pattern rule or a static pattern rule .它需要是模式规则或静态模式规则的一部分。
You can use $(wildcard $(OUTPUTDIR)/*.cpp)
to get a complete list of files, but it's an anti-pattern (pun intended).您可以使用
$(wildcard $(OUTPUTDIR)/*.cpp)
来获取完整的文件列表,但这是一种反模式(双关语)。 You are supposed to either exactly know what files are used in what rules, or (know it even better and) create a generic pattern rule.您应该确切地知道在哪些规则中使用了哪些文件,或者(甚至更好地了解并)创建通用模式规则。
The second pattern rule (one using somepythonscript.py
) is supposed to work on a single source-target file pair, $(INTXTDIR)/%.txt
-> $(OUTPUTDIR)/%.cpp
.第二个模式规则(一个使用
somepythonscript.py
)应该适用于单个源-目标文件对, $(INTXTDIR)/%.txt
-> $(OUTPUTDIR)/%.cpp
。 The command seems to process all the files in the directory, which is not incremental: it will redo all the work even if only one file was updated.该命令似乎处理目录中的所有文件,这不是增量的:即使只更新了一个文件,它也会重做所有工作。
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