在 /proc/mtrr 和 /proc/iomem 中识别 DMA 内存？

Question

I wonder if there is a way to identify memory used for DMA mapping in some proc files, such as mtrr and iomem , or via lspic -vv .

In my /proc/mtrr , there is only one uncachable region, and it seems to be pointing at the 'PCI hole' at 3.5-4GB, almost.

base=0x0e0000000 ( 3584MB), size=  512MB, count=1: uncachable

By cross verifying with /proc/iomem , of this 512MB region, only the last 21 MB before 4GB is NOT consumed by PCI Bus, and that 21MB sliver is occupied by things like pnp/IOAPIC/Reserved .

So my questions are:

1. What is the signature of DMA region in /proc/mtrr and /proc/iomem
2. Are there other places, such as other proc files and commands that I can use to see DMA region?
3. It seems by adding rows to /proc/mtrr , a privileged user can change caching mechanism of any memory, at runtime. So besides the fact that DMA has to be lower 32bit(assuming without DAC), are there other special requirement for DMA memory allocation? If there are no further requirment, then maybe the only hint I can use to identify DMA memory would be /proc/mtrr ?

Answer 1

DMA (Direct Memory Access) is just where a device accesses memory itself (without asking CPU to feed the data to the device). For a (simplified) example of DMA; imagine a random process does a write() , and this bubbles its way up (through VFS, through file system, through any RAID layer, etc) until it reaches some kind of disk controller driver; then the disk controller driver tells its disk controller "transfer N bytes from this physical address to that place on the disk and let me know when the transfer has been done". Most devices (disk controllers, network cards, video cards, sound cards, USB controllers, ...) use DMA in some way. Under load, all the devices in your computer may be doing thousands of transfers (via. DMA) per second, potentially scattered across all usable RAM.

As far as I know; there are no files in /proc/ that would help (most likely because it changes too fast and too often to bother providing any, and there'd be very little reason for anyone to ever want to look at it).

The MTTRs are mostly irrelevant - they only control the CPU's caches and have no effect on DMA requests from devices.

The /proc/iomem is also irrelevant. It only shows which areas devices are using for their own registers and has nothing to do with RAM (and therefore has nothing to do with DMA).

Note 1: DMA doesn't have to be in the lower 32-bit (eg most PCI devices have supported 64-bit DMA/bus mastering for a decade or more); and for the rare devices that don't support 64-bit it's possible for Linux to use an IOMMU to remap their requests (so the device thinks it's using 32-bit addresses when it actually isn't).

Note 2: Once upon a time (a long time ago) there were "ISA DMA controller chips". Like the ISA bus itself; these were restricted to the first 16 MiB of the physical address space (and had other restrictions - eg not supporting transfers that cross a 64 KiB boundary). These chips haven't really had a reason to exist since floppy disk controllers became obsolete. You might have a /proc/dma describing these (but if you do it probably only says "cascade" to indicate how the chips connect, with no devices using them).