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aarch64 在 EL3 中从 EL1 执行 IRQ

[英]aarch64 execute IRQ from EL1 in EL3

原文 2020-10-26 08:24:52 3 1 arm64/ bare-metal/ irq

Is it possible to execute an IRQ in EL3 (secure monitor) if IRQ was fired in EL1 context?如果在 EL1 上下文中触发了 IRQ，是否可以在 EL3（安全监视器）中执行 IRQ？ Eg I have entered EL1 via spsr_el3 (el1h selected) and after that setup a vector table with vbar_el1.例如，我已经通过 spsr_el3（选择了 el1h）进入了 EL1，然后用 vbar_el1 设置了一个向量表。 Now, some IRQs I want to execute in EL3 mode.现在，我想在 EL3 模式下执行一些 IRQ。 How can I do that?我怎样才能做到这一点？

1 个解决方案

What you want is called "Physical IRQ Routing", and is controlled via scr_el3 .您想要的称为“物理 IRQ 路由”，并通过scr_el3进行控制。 From the manual :从手册：

IRQ, bit [1]

        Physical IRQ Routing.

        0b0     When executing at Exception levels below EL3, physical IRQ
                interrupts are not taken to EL3.
                When executing at EL3, physical IRQ interrupts are not taken.

        0b1     When executing at any Exception level, physical IRQ interrupts
                are taken to EL3.

If you only want to handle some IRQs at EL3 and leave others to EL1, then you can simply handle that in the EL3 exception vector by setting:如果您只想在 EL3 处理一些IRQ 而将其他 IRQ 留给 EL1，那么您可以通过设置以下内容在 EL3 异常向量中简单地处理它：

spsr_el1 to spsr_el3 . spsr_el1到spsr_el3 。
elr_el1 to elr_el3 . elr_el1到elr_el3 。
elr_el3 to vbar_el1 plus one of 0x80 / 0x280 / 0x480 / 0x680 depending on the state bits in spsr_el3 . elr_el3到vbar_el1加上0x80 / 0x280 / 0x480 / 0x680 ，具体取决于 spsr_el3 中的spsr_el3位。
spsr_el3 = (spsr_el3 & ~0xf00fff) | 0x3c5 spsr_el3 = (spsr_el3 & ~0xf00fff) | 0x3c5 . spsr_el3 = (spsr_el3 & ~0xf00fff) | 0x3c5 。 If your architecture has PAN support, you'll also have to check spsr_el1 for the SPAN field, and if that's zero, OR 0x400000 into spsr_el3 .如果您的体系结构支持 PAN，您还必须检查spsr_el1中的SPAN字段，如果该字段为零，则将 0x400000 或0x400000放入spsr_el3中。