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没有规则在 GCC Makefile 中制作目标

[英]No rule to make target in GCC Makefile

This is the following Makefile at issue:这是有问题的以下 Makefile:

#
# Compiler flags
#
CC     = gcc
CFLAGS = -Wall -Werror -Wextra 

#
# Project files
# example - 
# SRCS = hash_table.c linked_list.c utils.c common.c business_logic.c user_interface.c
# SRCS = test/gc_test.c src/gc.c
SRCS := $(shell find . -name "*")
OBJS = $(SRCS:.c=.o)
EXE  = output.out

FILENAMES := $(shell find . -type f -name "*.c" -printf "%f\n")
FILENAMES_OUT = $(FILENAMES:.c=.o)
#
# Default build settings
#
BUILDDIR = build
BUILDCFLAGS = -g -O0
BUILDEXE = $(BUILDDIR)/$(EXE)
BUILDOBJS = $(addprefix $(BUILDDIR)/, $(FILENAMES_OUT))


# Rules for default build
all: clean build

build: $(BUILDEXE)

$(BUILDEXE): $(BUILDOBJS)
    $(CC) $(CFLAGS) $(BUILDCFLAGS) -o $(BUILDEXE) $^ -lcunit

$(BUILDDIR)/%.o: %.c
    $(CC) $(CFLAGS) $(BUILDCFLAGS) -c $< -o $@


memtest: $(BUILDEXE) 
    valgrind --leak-check=full ./$<


#
# Other rules
#
clean:
    mkdir -p $(BUILDDIR)

PROBLEM -> make: *** No rule to make target `build/gc_test.o', needed by `build/output.out'. Stop.问题-> make: *** No rule to make target `build/gc_test.o', needed by `build/output.out'. Stop. make: *** No rule to make target `build/gc_test.o', needed by `build/output.out'. Stop.

PROJECT TREE项目树

.
├── build
├── doc
│   └── design.md
├── Makefile
├── proj
│   ├── code_quality_report.md
│   ├── deviations.md
│   ├── individual_reflection.md
│   ├── team_reflection.md
│   └── test_report.md
├── README.md
├── src
│   ├── gc.c
│   └── headers
│       └── gc.h
└── tests
    └── gc_test.c

The issue itself happens in $(BUILDEXE): $(BUILDOBJS) where the dependencies are gc_test.c gc.c .问题本身发生在$(BUILDEXE): $(BUILDOBJS)中,其中依赖项是gc_test.c gc.c Those dependencies SHOULD get caught in the function below it, because it's input is all the.c files in the build directory.这些依赖项应该被捕获在它下面的 function 中,因为它的输入是build目录中的所有.c 文件。 Those files SHOULD get properly matched and then compiled to.o files which then should climb up the tree and produce an executable.这些文件应该得到正确匹配,然后编译为 .o 文件,然后应该爬上树并生成可执行文件。 I'm confused because $(BUILDOBJS) should be the same as $(BUILDDIR)/%.o .我很困惑,因为$(BUILDOBJS)应该与$(BUILDDIR)/%.o相同。

I'm new to making Makefiles, but I want to get better at it.我是制作 Makefile 的新手,但我想做得更好。 Please point out better naming conventions or terminology that could have been used better for this post.请指出更好的命名约定或术语可以更好地用于这篇文章。 Thanks!谢谢!

The problem is here:问题在这里:

FILENAMES := $(shell find . -type f -name "*.c" -printf "%f\n")

This is wrong because -printf "%f\n" prints only the filenames, without any path.这是错误的,因为-printf "%f\n"打印文件名,没有任何路径。 You're losing all information about the path where files are found, so how can make find them?您丢失了有关找到文件的路径的所有信息,那么如何才能找到它们呢?

You should change this to simply -print then it will work.您应该将其更改为简单的-print然后它将起作用。

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