可以以及如何在 linux 中为 openstack 实时迁移实例更新 cpu 功能标志

Question

I have three hypervisor with two type CPU process:

# hypervisor node-3:
cpu family  : 6
model       : 85
model name  : Intel(R) Xeon(R) Gold 6248R CPU @ 3.00GHz
stepping    : 7
microcode   : 0x5003003
flags       : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single intel_ppin ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts pku ospke avx512_vnni md_clear flush_l1d arch_capabilities
bugs        : spectre_v1 spectre_v2 spec_store_bypass swapgs taa itlb_multihit

# hypervisor node-4:
cpu family  : 6
model       : 85
model name  : Intel(R) Xeon(R) Gold 6240 CPU @ 2.60GHz
stepping    : 7
microcode   : 0x5003102
flags       : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single intel_ppin ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts pku ospke avx512_vnni md_clear flush_l1d arch_capabilities
bugs        : spectre_v1 spectre_v2 spec_store_bypass swapgs taa itlb_multihit

# hypervisor node-5:
cpu family  : 6
model       : 85
model name  : Intel(R) Xeon(R) Gold 6240 CPU @ 2.60GHz
stepping    : 7
microcode   : 0x5003003
flags       : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single intel_ppin mba tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local ibpb ibrs stibp dtherm ida arat pln pts pku ospke avx512_vnni arch_capabilities
bugs        : spectre_v1 spectre_v2

I could live migrate instances between node-3 and node-4 , but node-5 can't live migrate with all other hypervisors.

I know that because of the flags are not consistent, check from Host model (default for KVM & QEMU) .

Question:

• 1, could I update the CPU's flags ? and HOW?
• 2, why node-3 has different cpu model could have the same flags with node-4 ? node-4 and node-5 has the same cpu model but have the different flags ?
• 3, what's the microcode function? why only node-4 different with others?

Answer 1

The CPU model and flags are part of the guest visible ABI. As such, they can only be set at cold boot. IOW to change them, you'll need to power off the guest, update the <cpu> config as needed, and then boot the guest once more. Of course if you're having to cold boot, then there's little point in live migration - just boot it on the required host.

The microcode is something that is loaded into CPUs on host boot, essentially as a way to provide bug fixes to your physical CPUs. Typically updated microcode either gets installed when you update your BIOS / firmware, or when the operating system vendor sends updated microcode packages. Microcode can both add and remove CPU features, depending on what its trying to fix. Removing features is a problem for live migration, as it can prevent live migration from hosts without the microcode update, to hosts with the microcode udpate.

Clearly some of your nodes have received updated microcode, but others have not.