[英]DMA driver with PCIe for transferring information from the FPGA to RAM
I would like to write a driver and software that:我想编写一个驱动程序和软件:
the software asks for data every twenty seconds,and the hardware writes data to the DMA buffer and raises an interrupt when it's done.软件每二十秒请求一次数据,硬件将数据写入 DMA 缓冲区并在完成时引发中断。
Unfortunately I have no experience writing drivers,and I can't use the Xilinx IP core which already has Driver.不幸的是我没有编写驱动程序的经验,我不能使用已经有驱动程序的 Xilinx IP 内核。
The PCIe IP Core I use is UltraScale+ Device Integrated Block for PCI Express (PCIe).我使用的 PCIe IP Core 是 UltraScale+ Device Integrated Block for PCI Express (PCIe)。
I have implemented a simple driver that can read the status register on FPGA.我已经实现了一个简单的驱动程序,可以读取 FPGA 上的状态寄存器。 And I follow these steps to implement DMA:我按照以下步骤来实施 DMA:
//Driver_Probe
pci_set_master(pdev);
drv_priv->virt_addr = kmalloc(2048, GFP_DMA);
if (!drv_priv->virt_addr)
{
dev_err(dev, "Failed to kmalloc");
err = -ENOMEM;
return err;
}
drv_priv->bus_addr = pci_map_single(pdev, drv_priv->virt_addr, 2048, PCI_DMA_FROMDEVICE);
if (!drv_priv->bus_addr)
{
dev_err(dev, "Failed to allocate DMA buffer");
err = -ENOMEM;
return err;
}
What else do I need to add to achieve this driver?我还需要添加什么来实现这个驱动程序?
It is said that the data in the buffer cannot be read until the action is unmapped in the documentation.据说在文档中取消映射操作之前,无法读取缓冲区中的数据。 How can I successfully read the data after unmapping?取消映射后如何才能成功读取数据?
Are there any complete examples?有完整的例子吗? The references I found were too brief for newbies.我发现的参考资料对于新手来说太简短了。
I will be grateful for any help.我将不胜感激任何帮助。
I wrote a tutorial to transfert data from FPGA to CPU RAM with PCIe some years ago but it's with a CycloneV.几年前,我写了一个教程,使用 PCIe 将数据从 FPGA 传输到 CPU RAM,但它使用的是 CycloneV。
In short:简而言之:
/* Allocate and initialize shared control data */
dmas->dmabuff = dmam_alloc_coherent(&pdev->dev, BUFF_SIZE, &dmas->dma_handle, GFP_KERNEL);
if (!dmas->dmabuff){
printk("Error, can't alloc coherent\n");
goto err_return;
}
writel((unsigned long)(dmas->dma_handle), &dmas->bar0[CRA_REG_A2P_ADDR_MAP_LO0/4]);
In this example, the dma address configuration register is located under BAR0 in CRA_REG_A2P_ADDR_MAP_LO0
.在此示例中,dma 地址配置寄存器位于 CRA_REG_A2P_ADDR_MAP_LO0 中的CRA_REG_A2P_ADDR_MAP_LO0
下。
Once, PCIe core in FPGA have the buffer address, it will be able to read/write to CPU RAM.一旦 FPGA 中的 PCIe 内核有了缓冲区地址,它就可以读/写 CPU RAM。
It's an old tutorial, maybe Linux API changed a little bit now.这是一个旧教程,也许 Linux API 现在改变了一点。 But the spirit remain the same I think.但我认为精神保持不变。
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