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在 AVR MCU 上，状态寄存器中的 S 标志如何工作？

[英]On an AVR MCU, how does the S flag in the status register work?

原文 2022-04-26 21:45:38 5 1 avr/ atmega/ status-register

How exactly do the V and S flags function on the ATMEGA328? ATMEGA328 上的 V 和 S 标志 function 到底是怎么做的？

The ATMEGA328 has separate sign (S), carry (C), 2's complement overflow (V) and negative (N) flags. ATMEGA328 具有单独的符号 (S)、进位 (C)、2 的补码溢出 (V) 和负 (N) 标志。 N is the MSB (corresponding to the sign bit on other processors). N 是 MSB（对应于其他处理器上的符号位）。 How exactly the V flag operates is not well explained in the datasheet.数据表中没有很好地解释 V 标志的具体操作方式。 As I understand it, V is generally calculated as N⊕C.据我了解，V一般计算为N⊕C。 But S is defined in the datasheet as V⊕N which implies that it equals N⊕N⊕C or just C. If that's true then it doesn't make much sense to have a separate flag for it so I suspect I've misunderstood something here.但是 S 在数据表中定义为 V⊕N，这意味着它等于 N⊕N⊕C 或只是 C。如果这是真的，那么为它设置一个单独的标志就没有多大意义，所以我怀疑我误解了这里的东西。

1 个解决方案

V is not generally the same as N XOR C. V 通常与 N XOR C 不同。

I found a counterexample by looking at the ADC (Add with Carry) instruction in the manual and considering what would happen if you add 0xFF to 0x02 to get 0x01.我通过查看手册中的 ADC（带进位加法）指令并考虑如果将 0xFF 添加到 0x02 得到 0x01 会发生什么情况，找到了一个反例。

C would be 1 because 0xFF + 0x02 = 0x101, which is larger than 0xFF, so there is a carry from the most significant bit of the addition. C 将为 1，因为 0xFF + 0x02 = 0x101 大于 0xFF，因此加法的最高有效位有一个进位。
N would be 0 because it is simply the MSB of the result. N 将为 0，因为它只是结果的 MSB。
V would be 0 because it is defined to be 1 if two's complement overflow happened. V 将为 0，因为如果发生二进制补码溢出，它被定义为 1。 From the perspective of two's complement, we simply added -1 and 2 to get 1, so there is no overflow.从补码的角度来看，我们只是简单地把-1和2相加得到1，所以不会溢出。 And you can confirm this by carefully evaluating the formula in the manual to calculate V.您可以通过仔细评估手册中计算 V 的公式来确认这一点。