x86程序下面的端口为mips32

Question

Below sample code for X86 arch,

#  define INC(_lval,_lqual) \
      __asm__ __volatile__ ( \
      "lock ; incl (%0)" : /*out*/ : /*in*/"r"(&(_lval)) : "memory", "cc" )

Please somebody help me equivalent MIPS32 arch.

Answer 1

That looks like gcc inline assembly for an atomic increment. This is the gcc intrinsic for an atomic increment:

__sync_fetch_and_add(&_lval, 1);

Works on x86, mips32, etc.

Answer 2

I found a code that might be useful for you here . It seems in fact to indicate that the builtin for gcc is not implemented for that architecture.