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Makefile的两个编译器问题

[英]Makefile two compilers issue

I am asked to write a Makefile which needs to selects between two compilers, and each of these compilers should support 3 build versions (debug, release, test). 我被要求编写一个Makefile,该文件需要在两个编译器之间进行选择,并且每个编译器应支持3个构建版本(调试,发行版,测试)。

There are a lot of variables that change based on input (compiler, compiler options, output directory, include directories etc). 有很多变量会根据输入(编译器,编译器选项,输出目录,包含目录等)而变化。 My first option was to go through target-specific variables and configure variables according to target. 我的第一个选择是遍历目标特定的变量并根据目标配置变量。 Do you think this is good idea? 您认为这是个好主意吗?

I am not extremely familiar with those kind of variables. 我对这类变量不是很熟悉。 It seems to me that if I do something like this: 在我看来,如果我做这样的事情:

release: variable1=value1   #release is target
release: variable2=value2

release: 
      # some compilation rule

Only the variable1 will be configured. 将仅配置variable1 Am I right about this? 我对吗?


Update 更新资料

Thank you for your reply. 谢谢您的回复。 I am trying to deal with compiler selection issue through additional variable which would be configured according to target. 我正在尝试通过根据目标配置的其他变量来处理编译器选择问题。 But, here is the problem. 但是,这就是问题所在。 I have the following lines: 我有以下几行:

release: CFLAGS = -DCORE_SW_VERSION='"$(CORE_SW_VERSION)"' -Wall 
release: CFLAGS += -fgnu89-inline -mno-volatile-cache $(INCLUDE)  
release: TARGET=release

After this lines, I do some ifeq sequence in which I decide which compiler to use (according to TARGET variable value). 在这行之后,我执行一些ifeq序列,在其中确定要使用哪个编译器(根据TARGET变量值)。 And CFLAGS is configured properly, but the TARGET variable is empty. 并且CFLAGS配置正确,但是TARGET变量为空。 This leads me to conclusion that you can configure only one target-specific variable. 这使我得出结论,您只能配置一个特定于目标的变量。 Am I right? 我对吗? If not, I am not aware what I am doing wrong. 如果没有,我不知道我在做什么错。 Could you please help me? 请你帮助我好吗?

Target-specific variables are defined only when building that target and any prerequisites of that target. 特定于目标的变量仅在构建目标和该目标的任何先决条件时定义。 You can't use target-specific variables arbitrarily throughout the makefile (as it sounds like you're trying to do with ifeq ). 您不能在整个makefile中任意使用特定于目标的变量(这听起来像您正在尝试使用ifeq )。 For that, you may want to look at $(MAKECMDGOALS) . 为此,您可能需要查看$(MAKECMDGOALS) I don't believe there is any limit on the number of target-specific variables, certainly not a limit of one. 我不相信目标特定变量的数量有任何限制,当然也不是一个限制。

Needing either target-specific variables or $(MAKECMDGOALS) may be a warning that you're trying to do coerce make into doing something it wasn't meant to do. 需要特定于目标的变量或$(MAKECMDGOALS)可能会警告您正在尝试强制执行某项本不希望做的事情。

It's not clear to me whether you want to build three versions (debug/test/release with a single compiler for each one), or six versions. 对我来说尚不清楚,您是否要构建三个版本(每个调试器使用一个编译器进行调试/测试/发布)还是六个版本。 Assuming three, here is a unix-y Makefile to build with different compilers and CFLAGS depending on the target. 假设为三个,这是一个unix-y Makefile,根据目标使用不同的编译器和CFLAGS进行构建。 However, note that this could just as easily be coded with RELEASE_CFLAGS , RELEASE_CC , DEBUG_CFLAGS , etc... variables. 但是,请注意,可以使用RELEASE_CFLAGSRELEASE_CCDEBUG_CFLAGS等变量轻松对其进行编码。

all: release debug test

release: CC=gcc
release: CFLAGS=
debug: CC=gcc
debug: CFLAGS=-g
test: CC=cc
test: CFLAGS=-Wall

.PHONY: release debug test
release: release/exe
debug: debug/exe
test: test/exe

OBJECTS := test.o

release/%.o: %.c
        $(CC) $(CLFAGS) -c -o $@ $<

debug/%.o: %.c
        $(CC) $(CLFAGS) -c -o $@ $<

test/%.o: %.c
        $(CC) $(CLFAGS) -c -o $@ $<

release/exe: $(OBJECTS:%=release/%)
        $(CC) $(CFLAGS) -o $@ $^

debug/exe: $(OBJECTS:%=debug/%)
        $(CC) $(CFLAGS) -o $@ $^

test/exe: $(OBJECTS:%=test/%)
        $(CC) $(CFLAGS) -o $@ $^

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