[英]Makefile vpath not working for header files
I am trying to use vpath in my Makefile to avoid prefixing every source file with directory name. 我试图在我的Makefile中使用vpath以避免为每个源文件加上目录名前缀。 But I can't get it to work properly.
但是我无法使其正常工作。
Here's the Makefile: 这是Makefile:
CC=gcc -Wall
vpath %.h include
vpath %.c src
all: main.c Event.o Macros.h
$(CC) $< Event.o -o test/a.out
Event.o: Event.c Event.h Macros.h
$(CC) -c $< -o $@
The src directory is being included correctly. 正确包含了src目录。 ie Event.c file is found by gcc.
即Event.c文件由gcc找到。 But both Event.h and Macros .h are not.
但是Event.h和Macros .h都不是。 I get an errors in gcc saying that both files were not found when compiling Event.c.
我在gcc中收到一条错误消息,说在编译Event.c时找不到两个文件。
I tried changing the #include directive in my C file to each of these at a time. 我尝试一次将C文件中的#include指令更改为每个。
#include "Event.h" /* doesnt work */
#include <Event.h> /* doesnt work */
#include "../include/Event.h" /* works */
Can you please help me with this problem ? 您能帮我解决这个问题吗? I really want to avoid using directory names before every source file as my actual Makefile is bigger than this.
我真的想避免在每个源文件之前使用目录名称,因为我的实际Makefile大于此名称。
The vpath
directive only controls how Make finds dependencies; vpath
指令仅控制Make查找依赖关系的方式。 it doesn't affect in any way how GCC works. 它不以任何方式影响GCC的工作方式。 If you have headers in some other directory, you explicitly need to tell GCC with
-I
: 如果您在其他目录中有标头,则需要使用
-I
明确告知GCC:
INCLUDE := include
$(CC) -I$(INCLUDE) $c $< -o $@
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