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为具有一些安排好的文件夹的项目编写makefile

[英]Writing a makefile for an project with some arranged folders

I have the makefile below and a directory tree : 我在下面的makefile和目录树中:

->project/src/main.c, func.c, Makefile ->项目/ src / main.c,func.c,Makefile

->project/exe/ ->项目/ EXE /

->project/inc/ ->项目/ INC /

->project/obj/ ->项目/ obj /

  cc=gcc
    cflags=-c
    obj=../obj
    exe=../exe
    inc=../inc
    prog.exe: main.o func.o
        $(cc) main.o func.o -o $(exe)/prog.exe
    main.o: main.c $(inc)/defs.h
        $(cc) $(cflags) main.c
        mv main.o $(obj)/
    func.o: func.c $(inc)/defs.h
        $(cc) $(cflags) func.c
        mv func.o $(obj)/

The problem is, the second actions below main.o and func.o (those start with mv) doesn't work (ie main.o isn't moved to the /obj directory). 问题是,main.o和func.o(以mv开头)下面的第二个操作不起作用(即main.o未被移动到/ obj目录)。 Is there a problem in the syntax of makefile or anything else? makefile或其他语法是否存在问题?

One apparent problem is that the makefile doesn't build the targets it's supposed to build. 一个明显的问题是,makefile不会构建它应该构建的目标。 Ie: 即:

prog.exe: main.o func.o
    $(cc) main.o func.o -o $(exe)/prog.exe

Doesn't build prog.exe , rather it builds $(exe)/prog.exe , which is a different file. 不构建prog.exe ,而是构建$(exe)/prog.exe ,这是一个不同的文件。 A fix would be: 解决方法是:

$(exe)/prog.exe: $(obj)/main.o $(obj)/func.o
    $(cc) $^ -o $@

Prefer using automatic variables for the names of input and output files to avoid duplication and silly typos. 最好使用自动变量作为输入和输出文件的名称,以避免重复和愚蠢的错别字。

You may take care of the indentation with make. 您可以使用make处理缩进。 It needs real tabs. 它需要真实的标签。

See https://superuser.com/questions/224434/what-is-the-character-used-to-indent-the-make-file-rule-recipe 参见https://superuser.com/questions/224434/what-is-the-character-used-to-indent-the-make-file-rule-recipe

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