make中隐含规则的问题

Question

我有以下目录结构

         (root)
  /      /      \        \
/       |       |         \
src    obj  include     bin

我想使用隐式规则将root\\src所有.cc文件编译为root\\obj .o文件。

到目前为止，这是我的makefile：

basedir = .
incl = ${basedir}\include
obj = ${basedir}\obj
src = ${basedir}\src
lib = ${basedir}\lib
bin = ${basedir}\bin

CXX = gcc

LDLIBS = -lstdc++ -lmingw32 -lSDLmain -lSDL -lSDL_image -lchipmunk -lSDL_ttf \
-lSDL_mixer

LDFLAGS = -L${lib}

objects = $(addprefix ${obj}\, GameObject.o PhysicalObject.o \
Terrain.o Timer.o main.o ImageLoader.o Player.o )

sources = $(addprefix ${src}\, GameObject.cc PhysicalObject.cc \
Terrain.cc Timer.cc main.cc ImageLoader.cc Player.cc )

Cyborg : ${objects}
    ${CXX} ${objects} -o ${bin}\Cyborg.exe -L${lib} ${LDFLAGS} ${LDFLAGS}

${obj}\%.o : ${src}\%.c
    ${CXX} ${src}\$^ -c -o ${obj}\$@ 

.PHONY: clean

clean :
    rm ${bin}\Cyborg.exe ${objects}

我得到的错误是make: *** No rule to make target .\\obj\\GameObject.o, needed by Cyborg. Stop. make: *** No rule to make target .\\obj\\GameObject.o, needed by Cyborg. Stop.

知道发生了什么事吗？ 我对makefile非常陌生，因此这可能非常明显。

Answer 1

应用评论中的所有想法（并添加一些我自己的琐碎想法），我们得到：

basedir = .
incl = ${basedir}/include
obj = ${basedir}/obj
src = ${basedir}/src
lib = ${basedir}/lib
bin = ${basedir}/bin

CXX = g++

LDLIBS = -lstdc++ -lmingw32 -lSDLmain -lSDL -lSDL_image -lchipmunk -lSDL_ttf \
-lSDL_mixer

LDFLAGS = -L${lib}

objects = $(addprefix ${obj}/, GameObject.o PhysicalObject.o \
Terrain.o Timer.o main.o ImageLoader.o Player.o )

sources = $(addprefix ${src}/, GameObject.cc PhysicalObject.cc \
Terrain.cc Timer.cc main.cc ImageLoader.cc Player.cc )

Cyborg : ${objects}
    ${CXX} ${objects} -o ${bin}/Cyborg.exe -L${lib} ${LDFLAGS} ${LDFLAGS}

${obj}/%.o : ${src}/%.c
    ${CXX} $^ -c -o $@ 

.PHONY: clean Cyborg

clean :
    rm -f ${bin}\Cyborg.exe ${objects}

“ make Cyborg”与此Makefile有什么关系？

Answer 2

这可能要花一些迭代。

尝试一些简单的规则，以增加复杂性的顺序，然后告诉我们结果：

./obj/GameObject.o : ./src/GameObject.cc
    @echo trying to build $@ from $<

./obj/GameObject.o : ./obj/%.o : ./src/%.cc
    @echo trying to build $@ from $<

$(objects) : ./obj/%.o : ./src/%.cc
    @echo trying to build $@ from $<

./obj/%.o : ./src/%.cc
    @echo trying to build $@ from $<

Answer 3

${obj}\%.o : ${src}\%.c --> ${obj}\%.o : ${src}\%.cc

Answer 4

我对GNU make也有类似的问题。 尝试为您的对象制定显式规则：

$(obj)\GameObject.o: $(src)\GameObject.cc

$(obj)\PhysicalObject.o: $(src)\PhysicalObject.cc

# and so on for each object