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Makefile目标引用Makefile

[英]Makefile target references Makefile

I just discovered this line in a makefile: 我刚刚在makefile文件中发现了这一行:

%: Makefile

To me, that says "to make any target, you need this makefile" , which strikes me as somewhat obvious. 对我来说,这表明“要实现任何目标,您都需要此makefile” ,这使我感到有些明显。

Is there any situation in which this is not a no-op? 在任何情况下这都不是禁运吗?

As Etan commented, this will cause every target to be rebuilt whenever the Makefile changes. 正如Etan所说,只要Makefile更改,这将导致重建每个目标。 This is necessary so that anytime you make a change in the build configuration parameters the target will be rebuilt. 这是必要的,因此只要您在构建配置参数中进行更改,就可以重新构建目标。 Otherwise make won't know to rebuild with the new configuration. 否则,make将不知道要使用新配置进行重建。

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