[英]makefile, working fine but running commands even with no changes
I have the following make file. 我有以下make文件。 The problem is that even if there are no changes in the two .cpp files, it still run all the commands on prompt. 问题是,即使两个.cpp文件中没有任何更改,它仍会在提示符下运行所有命令。 Everything else is working fine. 其他一切工作正常。
all: hello1
hello1: make func
gcc hellomake.o hellofunc.o -o hello -I.
make: hellomake.c
gcc -c hellomake.c
func: hellofunc.c
gcc -c hellofunc.c
clean:
rm -rf *o hello
run:
./hello
Here is a sample Makefile that you can modifiy (especially CFLAGS section), and in won't relink 这是一个可以修改的示例Makefile(尤其是CFLAGS部分),并且不会重新链接
NAME = xxx
SRCS = xxx.c
OBJS = $(SRCS:.c=.o)
CC = gcc
RM = rm -rf
CFLAGS += -W -Wall -Wextra
CFLAGS += -O2
CFLAGS += -ansi -pedantic
CFLAGS += -D_FORTIFY_SOURCE=2 -D_GNU_SOURCE
all: $(NAME)
$(NAME): $(OBJS)
$(CC) $(OBJS) -o $(NAME)
clean:
$(RM) $(OBJS)
fclean: clean
$(RM) $(NAME)
re: fclean all
.PHONY: all clean fclean re
.PHONY allow to differentiate eventual file names and rule names .PHONY允许区分最终的文件名和规则名
You need to replace the .c to .o in the targets as described below 您需要按如下所述将目标中的.c替换为.o
make: hellomake.o
gcc -c hellomake.c
func: hellofunc.o
gcc -c hellofunc.c
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