[英]Makefile, linking a library
I have 4 source files and 5 header files and I use the following libraries: 我有4个源文件和5个头文件,并且使用以下库:
But when I try out my makefile I get the following error: 但是当我尝试我的makefile文件时,出现以下错误:
/usr/bin/ld: cannot find -lSDL_gfx.
This is the make file I have so far: 这是我到目前为止拥有的make文件:
The first rule links all the object files together and the other ones are responsible for creating the object files 第一条规则将所有目标文件链接在一起,其他规则负责创建目标文件
CC=gcc
CFLAGS=-I -c -fmessage-length=0 -D_SDL_main_h -lSDL -lSDL_ttf -lSDL_gfx.
DEPS = game.h field.h cell.h allocate_field.h GUI.h
OBJ = game.o field.o allocate_field.o GUI.o
OUTPUT = game
all: $(OBJ)
@echo Programma aanmaken
gcc -o $@ $^ $(CFLAGS)
game.o : game.c field.h GUI.h
@echo Bezig met game.o te compileren
$(CC) -c -o game.o game.c
field.o : field.c allocate_field.h cell.h
@echo Bezig met field.o te compileren
$(CC) -c -o field.o field.c
allocate_field.o : cell.h
@echo Bezig met allocate_field.o te compileren
$(CC) -c -o allocate_field.o allocate_field.c
GUI.o : field.h cell.h
@echo Bezig met GUI.o te compileren
$(CC) -L/home/usr/lib/x86_64-linux-gnu -lSDL -lSDL_ttf -lSDL_gfx -c -o GUI.o GUI.c
.PHONY : clean
clean:
@echo Cleaning... Object files verwijderen
rm -f *.o
rm -f $(OUTPUT)
EDIT 编辑
The directory my libraries are in is /usr/lib/x86_64-linux-gnu. 我的库所在的目录是/ usr / lib / x86_64-linux-gnu。
I tried the echo command with the directory I mentioned here above, but I cant get it to work 我在上面提到的目录中尝试了echo命令,但无法正常工作
EDIT EDIT 编辑编辑
I think you meant the dot in the CFLAGS line. 我认为您的意思是CFLAGS行中的点。 I removed it and then I got this error:
我将其删除,然后出现此错误:
undefined reference to `IMG_Load' which is one the functions of the SDL_image library
Then I also added -lSDL_image and now it works. 然后,我还添加了-lSDL_image,现在它可以工作了。
You have an extra dot. 你有一个额外的点。 Remove it.
去掉它。
there are several little 'oops' in the posted makefile. 在发布的makefile中有几个“ oops”。
Note: the :=
for the macro definitions, so they are only evaluated once. 注意::
:=
用于宏定义,因此它们仅被评估一次。
Note: could use: SRC := $(wildcard *.c)
then OBJ := $(SRC:.c=.o)
to get the list of object files. 注意:可以使用:
SRC := $(wildcard *.c)
然后OBJ := $(SRC:.c=.o)
获取目标文件列表。 However, there must not be any stray *.c files in the current directory 但是,当前目录中不得有任何杂散* .c文件
Note: library files are only needed at link time. 注意:仅在链接时需要库文件。
Note: when compiling should always enable all warnings, then fix those warnings. 注意:编译时应始终启用所有警告,然后修复这些警告。
Note: The order of items on the command line, when linking is important. 注意:链接时,命令行上项目的顺序很重要。 Always place the library path, followed by the 'short' library names last
始终放置库路径,后跟“短”库名称
Note: When ever a 'target' rule does not actually create a file with the same name, always proceed the rule with: .PHONY : target
注意:如果“目标”规则实际上未创建具有相同名称的文件,请始终使用以下规则进行处理:
.PHONY : target
Note: when calling system functions, it is (almost) always better to define a macro then invoke that macro. 注意:在调用系统函数时,(几乎)总是最好先定义一个宏,然后再调用该宏。 This results in better flexibility and less chance of an error.
这样可以提高灵活性,减少出错的机会。 See the
RM
and CC
macros for examples 有关示例,请参见
RM
和CC
宏。
Note: it is better to not define macros that will not be used: for instance the DEP
macro 注意:最好不要定义将不使用的宏:例如
DEP
宏
You might want to use something similar to this for compiling and linking as it does not invoke the shell functionality echo
and it results in a better looking output 您可能需要使用与此类似的内容进行编译和链接,因为它不会调用Shell功能
echo
并且会产生更好的输出
game.o : game.c field.h GUI.h
#
# ========= START $< TO $@ =========
$(CC) $(CFLAGS) -c $< -o $@ -I.
# ========= END $< TO $@ =========
#
By using something like: (note: gcc
has a parameter that can also do this) 通过使用以下命令:(注意:
gcc
具有可以执行此操作的参数)
%.d: %.c
#
# ========= START $< TO $@ =========
$(CC) -M $(CPPFLAGS) $< > $@.$$$$; \
sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g' < $@.$$$$ > $@; \
rm -f $@.$$$$
# ========= END $< TO $@ =========
plus this: 加上这个:
%.o: %.c %.d
#
# ========= START $< TO $@ =========
$(CC) $(CCFLAGS) -c $< -o $@ -I.
# ========= END $< TO $@ =========
#
and this: (with a DEP
macro) 这:(带有
DEP
宏)
ifneq "$(MAKECMDGOALS)" "clean"
-include $(DEP)
endif
then make
would generate all the dependency information so it would not have to be hardcoded into the makefile and all the compile statements would collapse into a single: 然后
make
将生成所有依赖项信息,因此不必将其硬编码到makefile中,并且所有compile语句都将折叠为一个:
%.o: %.c %.d
#
# ========= START $< TO $@ =========
$(CC) $(CCFLAGS) -c $< -o $@ -I.
# ========= END $< TO $@ =========
#
The above will not make much difference for this project, but when the project contains hundreds of files, it is a MAJOR savings in time and debugging effort 上面的内容对这个项目不会有太大的影响,但是当项目包含数百个文件时,可以节省大量时间和调试精力
The proposed makefile corrects all the obvious problems and allows running by: 建议的makefile纠正了所有明显的问题,并允许通过以下方式运行:
make
or
make game
or
make all
or for individual file compilation
make <objectFileName>
Here is the proposed makefile
这是建议的
makefile
RM := /usr/bin/rm
CC := /usr/bin/gcc
CFLAGS := -c -fmessage-length=0 -D_SDL_main_h
#a better CFLAGS would be:
#CFLAGS := -fmessage-length=0 -D_SDL_main_h -std=c99 -Wall -Wextra -pedantic -Wconversion -c
LFLAGS :=
LIBS := -L/usr/lib/x86_64-linux-gnu -lSDL -lSDL_ttf -lSDL_gfx
# DEPS := game.h field.h cell.h allocate_field.h GUI.h
OBJ := game.o field.o allocate_field.o GUI.o
OUTPUT := game
.PHONY : all
all: $(OUTPUT)
$(OUTPUT): $(OBJ)
@echo Programma aanmaken
$(CC) $(LFLAGS) -o $@ $(OBJ) $(LIBS)
game.o : game.c field.h GUI.h
@echo Bezig met game.o te compileren
$(CC) $(CFLAGS) -c $< -o $@ -I.
field.o : field.c allocate_field.h cell.h
@echo Bezig met field.o te compileren
$(CC) $(CFLAGS) -c $< -o $@ -I.
allocate_field.o : allocate_field.c cell.h
@echo Bezig met allocate_field.o te compileren
$(CC) $(CFLAGS) -c $< -o $@ -I.
GUI.o : GUI.c field.h cell.h
@echo Bezig met GUI.o te compileren
$(CC) $(CFLAGS) -c $< -o $@ -I.
.PHONY : clean
clean:
@echo Cleaning... Object files verwijderen
$(RM) -f *.o
$(RM) -f $(OUTPUT)
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