ARM NEON内部函数将D（64位）寄存器转换为Q（128位）寄存器的下半部分，而未定义上半部分

Question

I'd like to be able to essentially be able to typecast a uint8x8_t into a uint8x16_t with no overhead, leaving the upper 64-bits undefined. This is useful if you only care about the bottom 64-bits, but wish to use 128-bit instructions, for example:

uint8x16_t data = (uint8x16_t)vld1_u8(src); // if you can somehow do this uint8x16_t shifted = vextq_u8(oldData, data, 2);

From my understanding of ARM assembly, this should be possible as the load can be issued to a D register, then interpreted as a Q register.

Some ways I can think of getting this working would be:

• data = vcombine_u8(vld1_u8(src), vdup_n_u8(0)); - compiler seems to go to the effort of setting the upper half to 0, even though this is never necessary
• data = vld1q_u8(src); - doing a 128-bit load works (and is fine in my case), but is likely slower on processors with 64-bit NEON units?

I suppose there may be an icky case of partial dependencies in the CPU, with only setting half a register like this, but I'd rather the compiler figure out the best approach here rather than forcing it to use a 0 value.

Is there any way to do this?

Answer 1

On aarch32 , you are completely at the compiler's mercy on this. (That's why I write NEON routines in assembly)

On aarch64 on the other hand, it's pretty much automatic since the upper 64bit isn't directly accessible anyway.

The compiler will execute trn1 instruction upon vcombine though.

To sum it up, There is always overhead involved on aarch64 while it's unpredictable on aarch32 . If your aarch32 routine is simple and short, thus not many registers are necessary, chances are good that the compiler assigns the registers cleverly, but VERY unlikely otherwise.

BTW, on aarch64 , if you initialize the lower 64bit, the CPU automatically sets the upper 64bit to zero. I don't know if it costs extra time though. It did cost me several days until I found out what had been wrong all the time along. So annoying!!!