Makefile 中的变量替换产生意外结果

Question

I have a Makefile:

FOO=one two

$(FOO):
    echo $@

Now I run:

make one and get echo one

make two and get echo two

make three and get an error

This is expected.

However, when I change the Makefile to:

FOO=one two

$(FOO)$(FOO):
    echo $@

It is still the same!

I would expect that I have to type make oneone , but this is not the case.

Why is that?

Answer 1

Because make trustfully pastes whatever you give it as contents. Depending on the invisible rest of the line in FOO=one two... ie if you have a space there or not, you are producing one twoone two or one two one two . The latter is, I think, not illegal but will produce a warning like target given more than once in same line .