[英]Makefile: gcc line does not show up
If i run the line with make target_name
:如果我使用
make target_name
运行该行:
$(CC) $(CFLAGS) $(OPTS) $(TARGET) &> gcc_log_file
i get the following result in the gcc_log_file : nothing it is strange because if i type make -n target_name
, the line is well expanded.我在 gcc_log_file 中得到以下结果:没什么奇怪的,因为如果我输入
make -n target_name
,该行会很好地展开。
I could add '-v' to gcc but this will be quite ugly, i just want the GCC line to be expanded...我可以向 gcc 添加“-v”,但这会很丑陋,我只想扩展 GCC 行...
I tried the following workarounds我尝试了以下解决方法
@echo "$(OBJ) $$($(CC) $(CFLAGS) $(OPTS) $(TARGET))" &> gcc_log_file
@printf "$(OBJ) %s\n" $$($(CC) $(CFLAGS) $(OPTS) $(TARGET)) &> gcc_log_file
the CC line is executed, $(OBJ) is expanded but not the CC line...执行 CC 行,扩展 $(OBJ) 但不扩展 CC 行...
I should precise explicitly that I want to do this inside the makefile, because I don't want to log in the gcc_log_file lines that are not produced by gcc...My makefiles are quite complexes.我应该明确指出我想在 makefile 中执行此操作,因为我不想登录不是由 gcc 生成的 gcc_log_file 行......我的 makefile 非常复杂。
any hints?任何提示?
note that my gcc is a special one, based on gcc 5.2, but i reckon this behavior is the same.请注意,我的 gcc 是一个特殊的 gcc,基于 gcc 5.2,但我认为这种行为是相同的。
What you see is normal.你看到的是正常的。 Whatever
COMMAND
is, COMMAND &> FILE
executes COMMAND
and redirects its standard and error outputs to file FILE
.无论
COMMAND
是什么, COMMAND &> FILE
执行COMMAND
并将其标准和错误输出重定向到文件FILE
。 But in your case COMMAND
is a compilation command and if there are no errors or warnings your compiler does not print anything on stdout or stderr.但是在您的情况下
COMMAND
是一个编译命令,如果没有错误或警告,您的编译器不会在 stdout 或 stderr 上打印任何内容。 So, what is redirected to your log file is nothing at all.因此,重定向到您的日志文件的内容根本就没有。
You can check this very easily:你可以很容易地检查这个:
$ echo 'int main(void) { return 0; }' > foo.c
$ gcc -o foo foo.c
$
See?看? No output of any kind that you could send to a log file.
没有任何类型的输出可以发送到日志文件。
While if you make -n
it is make (not your compiler) that echoes the recipe it would pass to the shell without the -n option.而如果你
make -n
它是 make (不是你的编译器)回显它会在没有 -n 选项的情况下传递给 shell 的配方。 If you want to log your recipes you must echo them yourself in another recipe with, for instance, the echo
command that sends its shell-expanded parameters to the standard output:如果你想记录你的配方,你必须自己在另一个配方中回显它们,例如,将其 shell 扩展参数发送到标准输出的
echo
命令:
target: prerequisites
@echo "COMMAND" >> log_file
COMMAND
Example:例子:
foo: foo.c
@echo '$(CC) $(CFLAGS) -o $@ $<' >> log_file
$(CC) $(CFLAGS) -o $@ $<
If you do not want to type the same command twice you can declare a make variable:如果不想两次输入相同的命令,可以声明一个 make 变量:
COMPILATION = $(CC) $(CFLAGS) -o $@ $<
foo: foo.c
@echo '$(COMPILATION)' >> log_file
$(COMPILATION)
Or, all at once:或者,一下子:
COMPILATION = $(CC) $(CFLAGS) -o $@ $<
ECHOCOMPILE = echo '$(COMPILATION)' >> log_file; $(COMPILATION)
foo: foo.c
@$(ECHOCOMPILE)
(remove the leading @
if you want make to echo the recipe when passing it to the shell). (如果要在将配方传递给 shell 时回显配方,请删除前导
@
)。
Pay attention to the variable assignment operator ( =
).注意变量赋值运算符 (
=
)。 Do not use the simple assignment operator ( :=
), it would not work for reasons that are out of scope this question.不要使用简单的赋值运算符 (
:=
),由于超出此问题范围的原因,它不起作用。
Note that, by default, make echoes the recipes (if you do not prepend a @
).请注意,默认情况下, make 会回显配方(如果您没有添加
@
)。 So, you could as well redirect the output of make:因此,您也可以重定向 make 的输出:
$ cat Makefile
foo: foo.c
$(CC) $(CFLAGS) -o $@ $<
$ make &> log_file
$ cat log_file
gcc -o foo foo.c
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