Makefile make re 未运行所有模式规则

Question

I have trouble creating dependency files while using make re . The %.d pattern rule will be called before fclean , also only the %.o pattern rule were called by all after fclean . Here is the output when i use make vs make re :

mkdir -p srcs/depends
c++ -Wall -Werror -Wextra -Wshadow -std=c++98 -pedantic -Iincludes -MM srcs/tests.cpp -o srcs/depends/tests.d
c++ -Wall -Werror -Wextra -Wshadow -std=c++98 -pedantic -Iincludes -MM srcs/main.cpp -o srcs/depends/main.d
mkdir -p srcs/obj
c++ -Wall -Werror -Wextra -Wshadow -std=c++98 -pedantic -Iincludes -c srcs/main.cpp -o srcs/obj/main.o
c++ -Wall -Werror -Wextra -Wshadow -std=c++98 -pedantic -Iincludes -c srcs/tests.cpp -o srcs/obj/tests.o
c++ -lstdc++ srcs/obj/main.o srcs/obj/tests.o -o main

vs ( make re )

rm -f -rv srcs/obj srcs/depends 
srcs/obj/main.o
srcs/obj/tests.o
srcs/obj
srcs/depends/main.d
srcs/depends/tests.d
srcs/depends
rm -f main
mkdir -p srcs/obj
c++ -Wall -Werror -Wextra -Wshadow -std=c++98 -pedantic -Iincludes -c srcs/main.cpp -o srcs/obj/main.o
c++ -Wall -Werror -Wextra -Wshadow -std=c++98 -pedantic -Iincludes -c srcs/tests.cpp -o srcs/obj/tests.o
c++ -lstdc++ srcs/obj/main.o srcs/obj/tests.o -o main

My makefile:

NAME        = main
SRCSDIR     = srcs
SRCS        = $(wildcard $(SRCSDIR)/*.cpp)
OBJSDIR     = srcs/obj
OBJS        = $(SRCS:$(SRCSDIR)/%.cpp=$(OBJSDIR)/%.o)
DEPENDSDIR  = srcs/depends
DEPENDS     = $(SRCS:$(SRCSDIR)/%.cpp=$(DEPENDSDIR)/%.d)
CPPFLAGS    = -Wall -Werror -Wextra -Wshadow -std=c++98 -pedantic -Iincludes
DEPFLAGS    = -MM
LDFLAGS     = -lstdc++


all: $(NAME)

$(NAME): $(OBJS)
    c++ $(LDFLAGS) $^ -o $@

$(OBJSDIR)/%.o: $(SRCSDIR)/%.cpp | $(OBJSDIR)
    c++ $(CPPFLAGS) -c $< -o $@

$(DEPENDSDIR)/%.d: $(SRCSDIR)/%.cpp | $(DEPENDSDIR)
    c++ $(CPPFLAGS) $(DEPFLAGS) $< -o $@

$(OBJSDIR) $(DEPENDSDIR):
    mkdir -p $@

-include $(DEPENDS)

clean:
    $(RM) -rv $(OBJSDIR) $(DEPENDSDIR) 

fclean: clean
    $(RM) $(NAME)

re: fclean all

.PHONY: all clean fclean re

I have looked up the gnu make documentation and couldn't find any details. (Maybe I don't know where to look it up). Anybody knows why or are there any other cleaner solution to this? Thanks in advance

Answer 1

You are using the old-style header file generation method where make builds dependency files, then re-execs itself to read in the changed dependencies. So, when you run make first it parses all the .d files that currently exist (due to the include line) then it tries to rebuild the .d files, then if any have changed it re-execs, then it runs the rest of the makefile. Once it loads all the .d files and determines that they're up to date, make is done with them (for that invocation). If they later get deleted, it's not going to try to recreate them. They will be recreated the next time make is run.

In general, it's a bad idea to have a rule that runs clean and all as prerequisites. What if you enable parallel builds? Now make is running the clean and all rules in parallel. If you want to do this, you need to invoke them as sub-makes rather than via prerequisites, like this:

re:
        $(MAKE) fclean
        $(MAKE) all

This will ensure each target is built serially, even with parallel builds, and that make will be started from scratch to build all .

Another thing you should consider is using a more modern form of dependency generation; for example: https://make.mad-scientist.net/papers/advanced-auto-dependency-generation/