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verilog VPI回电

[英]verilog VPI Call Back

What is VPI call back cbValueChange supposed to do and how does it work? VPI回调cbValueChange应该做什么以及如何工作?

Suppose I want to execute a function at the posedge of signal X (about 2000 cycles). 假设我想在执行功能posedge信号X (约2000次循环)。 Should I use call back cbValueChange or call the code from the test bench? 我应该使用回cbValueChange还是从测试平台调用代码?

always @posedge(X) 
begin 
    $pli 
end 

Which would be more efficient? 哪个会更有效?

cbValueChange is the reason used to register/receive value change event for a registered signal via vpi_register_cb() . cbValueChange是用于通过vpi_register_cb()来注册/接收已注册信号的值更改事件的原因。 So when the signal value got flipped or changed, the simulator will invoke the callback function at the proper simulation phase. 因此,当信号值被翻转或更改时,模拟器将在适当的模拟阶段调用回调函数。 If you want to invoke your own PLI/VPI function only, you can see the detail example in http://www.asic-world.com/verilog/pli5.html 如果只想调用自己的PLI / VPI函数,则可以在http://www.asic-world.com/verilog/pli5.html中查看详细示例

Efficiency wise it probably doesn't matter much. 在效率方面,这可能并不重要。 Without a better understanding of your situation it's tough to give solid advice but I recommend the $pli call as in your example. 如果没有更好地了解您的情况,很难给出可靠的建议,但是我建议像您的示例中那样调用$ pli。 Using cbValueChange means registering some C code to be executed by the simulator when the value of a variable changes. 使用cbValueChange意味着在变量值更改时注册一些要由模拟器执行的C代码。 This happens without a user defined $pli routine being called at the time the value changes. 这种情况不会在值更改时调用用户定义的$ pli例程的情况下发生。 Since this is completely invisible to anybody reading the Verilog code, you will frustrate anybody trying to understand what is going on if your C code makes any changes that affect the simulation. 由于这对于阅读Verilog代码的任何人都是完全不可见的,因此如果您的C代码进行了任何会影响模拟的更改,那么您将使试图理解正在发生的事情的任何人感到沮丧。

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