Is there a way to keep a word sized immediate in a 32bit register instruction

Question

Assume the following x86-32 instruction:

add ebx,1

There are (at least) two ways to assemble this opcode:

81 c3 01 00 00 00

or

83 c3 01

The first keeps 1 as a 4 bytes dword the second keeps 1 as a byte

Is there an instruction that keeps 1 as 2 bytes? If no why?

Answer 1

You have stumbled upon a quirk of the x86 instruction set. Intel included a group of instructions under the stem 83 , whose first operand is of type Ev , and whose second operand is an immediate byte that is interpreted as being the same size as the Ev operand. So for 83 c3 01 , the 01 is interpreted as a 32-bit value; for 66 83 c3 01 , the 01 is interpreted as a 16-bit value (and the destination is the 16-bit ax register). The push mnemonic coded under the stem 6A behaves in the same way with respect to the size of its single operand.

The broader answer to your question is no, there is no encoding where a 16-bit constant is interpreted as a 32-bit one.

Source: I wrote a disassembler.

Answer 2

66 81 C3 01 00 ("add bx, 01" when in 32-bit mode) might be considered an example of it.

There is no such example that does not require an override because there isn't a need for it. The reason why the first example requires four bytes is so that it can span the entire 4Gb range. The second one uses only one byte because it is limited to +/-128 (256 values total). By using an override, we can restrict the first example to 64kb, but really it's not one byte in two, it's still two bytes.

Answer 3

It's very common to use small integers in programming - regardless of the destination size. The benefit is reduced instruction encoding. Many instruction support this: IMUL, ADD, ADC, SUB, SBB, AND, CMP, etc... Also, the addressing mode supports a byte size sign-extended offset to help reduce code size.

As to the why not: I would gather the added savings is minimal in comparison to the savings of the byte encoding. The ENTER instruction does use a 16-bit immediate, but it is unsigned and fixed to updating register RSP/ESP/SP.