Address of Instruction that Caused exception ARM

Question

which register stores the address of instruction which caused an exception(eg DataAbort)

is it always lr-4 (in 32) or there is a specific register in powerpc there is but in arm I dont know

Answer 1

For Cortex-A and Cortex-R, at entry to the Data Abort handler the LR of ABT mode will contain the address of the offending instruction +8 (no matter whether the offending instruction was in ARM state or Thumb state).

See section B1.8.3 (especially Table B1-7) of the ARM ARM for details.