I am working on a cordic project, but it seems that I am having trouble with the 16 to 1 multiplexer.
I already tried re-writing the code, but still no clue.
module mux_16(operand, reg_in, select);
output operand;
input [15:0] reg_in;
input [3:0] select;
always@(select, reg_in) begin
case(select)
0: operand = reg_in[0];
1: operand = reg_in[1];
2: operand = reg_in[2];
3: operand = reg_in[3];
4: operand = reg_in[4];
5: operand = reg_in[5];
6: operand = reg_in[6];
7: operand = reg_in[7];
8: operand = reg_in[8];
9: operand = reg_in[9];
10: operand = reg_in[10];
11: operand = reg_in[11];
12: operand = reg_in[12];
13: operand = reg_in[13];
14: operand = reg_in[14];
15: operand = reg_in[15];
default: operand = 0;
endcase
end
endmodule
In your code, output operand
should be declared as reg
, because in procedural block "always"
, you can not assign any value to a non-reg type. More informations here
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