How do I loop through a string in makefile?

Question

I want to write a Makefile that will iterate through a string and print it word by word.

Here is what I did in the Makefile:

MINION="fou foo bar"
test:
    @for n in $(MINION); do \
        echo "$$n"; \
    done

Actual output:

fou foo bar

What I want to get is:

fou
foo
bar

I also want to iterate on sentences that has a whitespace and coma separator, ex. "fou, foo, bar"

Answer 1

Makefile variables do not use the same assignment syntax as shell variables. MINION="foo fou bar" will assign the string "foo fou bar" to the MINION Makefile variable, which will then be substituted into the shell command line as for n in "foo fou bar" .

Use instead

MINION = foo fou bar