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Core physical registers usage for XMM registers

In X86, What type of physical internal registers a CPU uses for XMM type registers. Would that be integer or vector physical registers?

I think vector registers are used because XMM registers are 128-bit registers. Any confirmation is appreciated.

XMM registers are vector registers. They're renamed onto the FP/SIMD register file, not (general-purpose) integer, regardless of whether you're using SIMD-integer or SIMD-fp instructions.

https://blog.stuffedcow.net/2013/05/measuring-rob-capacity/ shows how to approximately measure the capacities of the physical register files for integer vs. SIMD, since those can be a smaller limit than ReOrder Buffer size for hiding cache-miss latency.

Intel since Sandybridge and AMD since even longer ago have renamed registers onto physical register files, with separate ones for general-purpose integer vs. SIMD/FP.

https://www.realworldtech.com/sandy-bridge/5/ shows that Sandybridge's SIMD PRF has has 144 entries, vs. 160 entries in the general-purpose integer PRF. (vs. P6 family, Nehalem and earlier, not using a separate PRF, but keeping register values directly in the ROB). vs. Skylake with 180 entries in the integer PRF vs. 168 in the SIMD PRF https://en.wikichip.org/wiki/intel/microarchitectures/skylake_(client)#Scheduler

Skylake splits further, with a separate register file for renaming 80-bit x87/MMX and AVX-512 mask registers (k0..7), separate from the 512-bit entries in the vector register file. https://travisdowns.github.io/blog/2020/05/26/kreg2.html


For more about x86 CPU internals, see Agner Fog's microarch guide on https://agner.org/optimize/ and other links in https://stackoverflow.com/tags/x86/info

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