[英]Unable to display the simulation with EDAPlayground compiler
I have tried the following code from myHDL manual on EDAPlayground.com, but it didn't print anything out for me. 我已经尝试了EDAPlayground.com上myHDL手册中的以下代码,但没有为我输出任何内容。 Can anyone show me why ? 谁能告诉我为什么? and how to solve this ? 以及如何解决呢?
My configuration on the site is outlined here. 这里概述了我在网站上的配置。
Testbench+Design : Python only Methodology : MyHDL 0.8 Testbench + Design:仅Python方法:MyHDL 0.8
from random import randrange from myhdl import * 来自myhdl import的随机导入randrange *
ACTIVE_LOW, INACTIVE_HIGH = 0, 1
def Inc(count, enable, clock, reset, n):
""" Incrementer with enable.
count -- output
enable -- control input, increment when 1
clock -- clock input
reset -- asynchronous reset input
n -- counter max value
"""
@always_seq(clock.posedge, reset=reset)
def incLogic():
if enable:
count.next = (count + 1) % n
return incLogic
def testbench():
count, enable, clock = [Signal(intbv(0)) for i in range(3)]
# Configure your reset signal here (active type, async/sync)
reset = ResetSignal(0,active=ACTIVE_LOW,async=True)
## DUT to be instantiated
inc_1 = Inc(count, enable, clock, reset, n=4)
HALF_PERIOD = delay(10)
## forever loop : clock generator
@always(HALF_PERIOD)
def clockGen():
clock.next = not clock
## Stimulus generator
@instance
def stimulus():
reset.next = ACTIVE_LOW
yield clock.negedge
reset.next = INACTIVE_HIGH
for i in range(12):
enable.next = min(1, randrange(3))
yield clock.negedge
raise StopSimulation
@instance
def monitor():
print "enable count"
yield reset.posedge
while 1:
yield clock.posedge
yield delay(1)
print " %s %s" % (enable, count)
return clockGen, stimulus, inc_1, monitor
tb = testbench()
def main():
Simulation(tb).run()
You need to call the main() function at the end. 您需要在最后调用main()函数。 Eg, add a line 例如,添加一行
main()
at the end, or better, use Python's idiom of 最后,或者更好的是,使用Python的习惯用法
if __name__=="__main__":
main()
声明:本站的技术帖子网页,遵循CC BY-SA 4.0协议,如果您需要转载,请注明本站网址或者原文地址。任何问题请咨询:yoyou2525@163.com.