缺少使用公司模式的Verilog模式的完整候选人

Question

I am using company-mode to do the auto complete in Verilog-mode. I want to write end and start a newline. But after I key in end , company-mode gives me the candidate list( endfunction , endclass , endmodule , endpackage ). I have to put an extra SPACE after end before I press ENTER.

I am not sure how could I add end to that candidate list? or I should file this issue to company-mode developer or Verilog-mode developer?

Answer 1

company-mode doesn't support verilog-mode yet. But it can be fixed by add verilog keywords to solve this problem

(require 'company)
(require 'verilog-mode)
(add-to-list 'company-keywords-alist (cons 'verilog-mode verilog-keywords))

Hope some can create a proper backend for verilog-mode.