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为剃刀触发器的时钟添加延迟

[英]Adding delay to clock for razor flip flop

原文 2016-03-25 18:03:49 5 1 razor/ verilog

i am doing a project in vedic我正在做一个吠陀项目

Heading标题

multiplier wherein i have to use razor flip flop where i have a main clock to one flip flop and another delayed clock to another flip flop and compare .can anybody say how to give to delay to clock # is not working.delay must meet setup time of both flip flops乘法器，其中我必须使用剃刀触发器，其中我有一个主时钟到一个触发器，另一个延迟时钟到另一个触发器并进行比较。有人可以说如何延迟时钟 # 不起作用。延迟必须满足设置时间两个人字拖

1 个解决方案

In the Razor proposal, a Razor flip-flop consists of a pair of a normal edge-triggered flip-flop, and a "shadow latch" triggered by a delayed version of the clock.在 Razor 提案中，一个 Razor 触发器由一对正常的边沿触发触发器和一个由时钟延迟版本触发的“影子锁存器”组成。 You can implement this by using a PLL to shift the clock by a known phase shift (assuming the clock's frequency is within the range of the PLL's VCO, this is straightforward).您可以通过使用 PLL 将时钟移动已知的相移来实现这一点（假设时钟频率在 PLL 的 VCO 范围内，这很简单）。 The shadow latch may be a level sensitive latch as is available on some FPGA hardware, or you may use a particularly late edge trigger and sacrifice some of the benefits of the Razor design in order to work with your available storage/register resources.影子锁存器可能是在某些 FPGA 硬件上可用的电平敏感锁存器，或者您可以使用特别晚的边沿触发并牺牲 Razor 设计的一些优势，以便使用可用的存储/寄存器资源。