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在凿子项目模板中编译凿子源文件

[英]Compiling chisel source files in chisel project template

I'm new to chisel. 我是凿子的新手。 Currently I'm following chisel-tutorial wiki using chisel3. 目前,我正在使用chisel3遵循chisel-tutorial wiki。 After cloning the chisel project template linked there, I tried to test and generate verilog output from GCD.scala source file. 克隆链接在那里的凿子项目模板后,我尝试测试并从GCD.scala源文件生成verilog输出。 I got the following error. 我收到以下错误。

> run --v
java.lang.RuntimeException: No main class detected.
    at scala.sys.package$.error(package.scala:27)
[trace] Stack trace suppressed: run last compile:run for the full output.
[error] (compile:run) No main class detected.
[error] Total time: 0 s, completed Dec 1, 2016 12:28:46 AM

So following a solution I found on a mailing list (to this same problem) I inserted the following code block at the end of GCD.scala file 因此,按照我在邮件列表中找到的解决方案(针对同一问题),我在GCD.scala文件的末尾插入了以下代码块

object GCDMain {
def main(args: Array[String]): Unit = {
    chiselMainTest(Array[String]("--backend", "c", "--genHarness"),
        () => Module(new GCD())){c => new GCDTests(c)}
}
}

But I still get the same error. 但是我仍然遇到同样的错误。 (I added the GCDTests class too) (我也添加了GCDTests类)

In moving from Chisel 2 to Chisel 3, the developers of Chisel made the decision to promote ScalaTest-style testing of Chisel designs. 从Chisel 2移至Chisel 3时,Chisel的开发人员决定推广ScalaTest风格的Chisel设计测试。 The chisel-template repo provides a test that can be run with the command sbt test (for more information on testing with sbt, see http://www.scala-sbt.org/0.13/docs/Testing.html ). chisel-template repo提供了可以使用sbt test命令sbt test (有关使用sbt进行测试的更多信息,请参见http://www.scala-sbt.org/0.13/docs/Testing.html )。 Running this command will generate Verilog and run some execution-driven tests to show that the example code works. 运行此命令将生成Verilog并运行一些执行驱动的测试,以证明示例代码有效。

The GCDMain you found in the mailing list would have worked in Chisel 2 but will not work for Chisel 3. If you just want to Verilog and not run any tests, please see Is there a simple example of how to generate verilog from Chisel3 module? 在邮件列表中找到的GCDMain可以在Chisel 2中使用,但不适用于Chisel3。如果您只想使用Verilog而不进行任何测试,请参阅是否有一个简单的示例,该示例如何从Chisel3模块生成verilog? .

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