[英]Using CustomBundle template in chisel inside a class that extends blackbox
I have a list of signals with bitwidth information and directionality of the signals.我有一个包含位宽信息和信号方向性的信号列表。 I want to create these IOs on the fly and make use of the CustomBundle that extends Record.
我想即时创建这些 IOs 并使用扩展 Record 的 CustomBundle。 I was able to do this in a normal class that doesn't extend BlackBox.
我能够在不扩展 BlackBox 的普通 class 中做到这一点。 However when I use CustomBundle inside the class that extends blackboxes I run into errors.
但是,当我在扩展黑盒的 class 中使用 CustomBundle 时,我遇到了错误。 Can CustomBundles be used inside a class that extends blackbox?
可以在扩展黑盒的 class 内使用 CustomBundles 吗? If not are there any workarounds other than scripting so that I can automate the construction of signals inside the blackbox class.
如果没有,除了脚本之外还有其他解决方法,以便我可以自动构建黑盒 class 内的信号。
I figured out a way of doing this.我想出了一个办法。 Created a class that extends Record for various signal types and then grouped them using a bundle inside the blackbox and made the connection.
创建了一个 class 扩展各种信号类型的记录,然后使用黑盒内的捆绑包将它们分组并建立连接。
UPDATE: I didn't have to rename my signals in the verilog file EDIT: Added example for Record更新:我不必在 verilog 文件中重命名我的信号编辑:为记录添加示例
import chisel3._
import chisel3.stage.ChiselStage
import chisel3.util.{HasBlackBoxInLine}
import scala.collection.immutable.ListMap
class MyBlackBox extends BlackBox with HasBlackBoxInline{
val io = IO(new MyBundle)
setInline("My_Verilog.v",
s"""
|module MyBlackBox(
| input a,
| input b,
| output c
|);
|always @* begin
| c < = a & b
|end
|endmodule
""".stripMargin)
}
class MyBundle extends Record{
val signalName = Seq(a,b)
val elements_i = ListMap(Seq.tabulate(2){i => signalName(i) -> Input(UInt(1.W))}:_*)
val elements_o = ListMap(Seq.tabulate(1){i => c -> Output(UInt(1.W))}:_*)
val elements = elements_i ++ elements_o
override def cloneType: this.type = (new MyBundle).asInstanceOf[this.type]
}
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