VHDL 纹波计数器（使用 3 D 型 FF）

Question

I cannot find a single website showing the VHDL code for a basic Ripple Counter (made of 3 D-type Flip Flops). Could you post the code below or point to resources to find the answer. I presume it is only a few lines long...

Answer 1

I guess you can easily define it as a bank of D flip-flips, connecting to each input D its output Q inverted. The clock connections are also the previous flip-flop outputs unless the first on the bank, which gets the general clock.

Hope this helps... You might want to try it yourself :)