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Cortex-M4 中的未对齐访问是原子的吗？

[英]Is unaligned access in Cortex-M4 atomic?

原文 2019-11-30 03:34:34 7 1 arm/ embedded/ cortex-m/ cortex-m3

In the ARM documentation , it mentions that在ARM 文档中，它提到

The Cortex-M4 processor supports ARMv7 unaligned accesses, and performs all accesses as single, unaligned accesses. Cortex-M4 处理器支持 ARMv7 未对齐访问，并将所有访问作为单个未对齐访问执行。 They are converted into two or more aligned accesses by the DCode and System bus interfaces.它们被 DCode 和 System 总线接口转换为两个或多个对齐的访问。

It's not clear to me if this means the data access is atomic to the programmer or not.我不清楚这是否意味着数据访问对程序员来说是原子的。 Then I found a StackOverflow comment interpreting the documentation as:然后我发现 StackOverflow 评论将文档解释为：

Actually some ARM processors like the Cortex-M3 support unaligned access in HW, so even an unaligned read/write is atomic.实际上，某些 ARM 处理器（如 Cortex-M3）支持 HW 中的未对齐访问，因此即使是未对齐的读/写也是原子的。 The access may span multiple bus cycles to memory, but there is no opportunity for another instruction to jump in between, so it is atomic to the programmer.访问可能跨越多个总线周期到内存，但没有机会让另一条指令在其间跳转，因此它对程序员来说是原子的。

However, I looked around some more and found claims that contradicts the previous claim:然而，我又环顾四周，发现与之前的说法相矛盾的说法：

Another one is the fact that on cores beginning ARMv6 and later, in order for the hardware to “fix-up” an unaligned access, it splits it up into multiple smaller, byte loads.另一个事实是，在 ARMv6 及更高版本的内核上，为了让硬件“修复”未对齐的访问，它会将其拆分为多个较小的字节负载。 However, these are not atomic..但是，这些不是原子的..

So, who do I believe?那么，我相信谁呢？ For some context, I have setters/getters for each element in a packed struct in my project.对于某些上下文，我在项目的打包结构中为每个元素设置了 setter/getter。 In other words, some struct elements may be unaligned.换句话说，某些结构元素可能未对齐。 I was wondering if accessing the struct elements will always be guaranteed to be atomic on Cortex-M4.我想知道在 Cortex-M4 上是否始终保证访问结构元素是原子的。 If it's not, I am thinking I will have to enable/disable interrupts manually or add in some mutex, but I'd rather not if ARM Cortex M4 can just guarantee the data accesses to be atomic.如果不是，我想我将不得不手动启用/禁用中断或添加一些互斥量，但如果 ARM Cortex M4 只能保证数据访问是原子的，我宁愿不这样做。

1 个解决方案

Nope, it isn't.不，不是。

See section A3.5.3 of the ARMv7-M Architecture Reference Manual :请参阅ARMv7-M 体系结构参考手册的 A3.5.3 部分：

In ARMv7-M, the single-copy atomic processor accesses are:在 ARMv7-M 中，单副本原子处理器访问是：

All byte accesses.所有字节访问。

All halfword accesses to halfword-aligned locations.对半字对齐位置的所有半字访问。

All word accesses to word-aligned locations对字对齐位置的所有字访问

So, if you are copying a uint32 that isn't aligned to a 32-bit boundary (which is allowed in v7-M), the copy isn't atomic.因此，如果您正在复制未与 32 位边界对齐的 uint32（v7-M 中允许），则该副本不是原子的。

Also quoting:还引用：

When an access is not single-copy atomic, it is executed as a sequence of smaller accesses, each of which is single-copy atomic, at least at the byte level.当访问不是单副本原子时，它将作为一系列较小的访问执行，每个访问都是单副本原子的，至少在字节级别是这样。