[英]How do I realize a Full Adder without the use of AND gates?
So.所以。 A normal full adder that have 3 inputs
A, B, Ci (carry in)
and 2 outputs S (Sum), Co (Carry-out)
.具有 3 个输入
A, B, Ci (carry in)
和 2 个输出S (Sum), Co (Carry-out)
的普通全加器。 After doing truthtable and K-map we get the function for S as: S = A ⊻ B ⊻ Ci
and the function for Co as: AB ∨ Ci(A ⊻ B)
Now when we are realizing this in gate-form S is pretty simple.在完成真值表和 K-map 之后,我们得到 S 的 function 为:
S = A ⊻ B ⊻ Ci
和 Co 的 function 为: AB ∨ Ci(A ⊻ B)
简单的。 2 XOR gates where one with inputs A and B are connected to a second one. 2 个 XOR 门,其中一个输入 A 和 B 连接到第二个。 However, we are supposed to NOT use AND gates in this realization and in the Co function I can't solve on how to design the circuit.
然而,我们不应该在这个实现中使用与门,在 Co function 中,我无法解决如何设计电路的问题。 We are not told we can't use NAND gates, so that is a possibility.
我们没有被告知我们不能使用与非门,所以这是可能的。 Is that the only way to solve it?
这是解决它的唯一方法吗?
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