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VHDL textio读取文件调试

[英]VHDL textio read file debug

I am having some trouble debugging this program. 我在调试该程序时遇到了一些麻烦。 I was given an assignment to read test vectors from a text file to test a program. 我被指派从文本文件中读取测试向量以测试程序。 The program and test bench code is written below. 程序和测试平台代码如下所示。 I cannot figure out why my simulation is coming up blank. 我无法弄清楚为什么我的模拟结果空白。 No errors, the simulation window comes up, but it is blank. 没有错误,模拟窗口出现,但是它是空白的。 Any idea what the problem may be? 知道可能是什么问题吗?

Module: 模块:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity PAR is
Port ( data : in  STD_LOGIC_VECTOR (3 downto 0);
       parity : out  STD_LOGIC);
end PAR;

architecture Behavioral of PAR is
begin
proc: process
variable count: bit;
begin
for i in data'range loop
    if data(i)='1' then
        count:=not count;
    end if;
end loop;
if count='0' then
    parity<='0';
else 
    parity<='1';
end if;
wait;
end process;


end Behavioral;

Test Bench: 试验台:

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE std.textio.all;
use ieee.std_logic_textio.all;

ENTITY PAR_test IS
END PAR_test;

ARCHITECTURE behavior OF PAR_test IS 

    -- Component Declaration for the Unit Under Test (UUT)

    COMPONENT PAR
    PORT(
         data : IN  std_logic_vector(3 downto 0);
         parity : OUT  std_logic
        );
    END COMPONENT;


   --Inputs
   signal data : std_logic_vector(3 downto 0) := (others => '0');

    --Outputs
   signal parity : std_logic;
   -- No clocks detected in port list. Replace <clock> below with 
   -- appropriate port name 

BEGIN

    -- Instantiate the Unit Under Test (UUT)
   uut: PAR PORT MAP (
          data => data,
          parity => parity
        );

   TB: process
        file vec_file: text;
        variable buf_in: line;
        variable testv: std_logic_vector(0 to 4);
        begin
            file_open(vec_file,"PAR_file.txt,", read_mode);
        while not endfile (vec_file) loop
            readline (vec_file, buf_in);
            read(buf_in,testv);
            data(3) <= testv(0);
            data(2) <= testv(1);
            data(1) <= testv(2);
            data(0) <= testv(3);
            wait for 10 ns;
            assert (parity=testv(4))
                report "Test Failed" severity error;
        end loop;
    wait;
    END process;
    end;

in your "file_open.." line you have a "," that's not needed 在“ file_open ..”行中,有一个不需要的“,”

wrong is: 错误的是:

file_open(vec_file,"PAR_file.txt,", read_mode);

correct is: 正确的是:

file_open(vec_file,"PAR_file.txt", read_mode);

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